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參數(shù)資料
| 型號： | W6693A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
| 中文描述： | USB總線綜合業(yè)務(wù)數(shù)字網(wǎng)的S / T接口控制器（綜合業(yè)務(wù)數(shù)字網(wǎng)的USB總線的S / T的接口控制器） |
| 文件頁數(shù)： | 22/32頁 |
| 文件大小： | 423K |
| 代理商： | W6693A |
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Preliminary Data Sheet
W6694 Passive USB-ISDN S/T-Controller
-22-
Publication Release Date: March., 2000
Revision 0.93
Setting this bit clears error indication bit ISOE of Isochronous-OUT error. This bit is carried by Isochronous-IN
packet. After bits are cleared, this bit becomes 0.
DLP Digital Loopback
Setting this bit activates the digital loopback function. The transmitted digital 2B+D channels are looped to the
received 2B+D channels. Note that after hardware reset, the internal clocks will turn off if the S bus is not connected
or if there is no signal on the S bus. In this case, the C/I command ECK must be issued to enable loopback function.
This bit remains set, until cleared by software reset (SRST).
RLP Remote Loopback
Setting this bit activates the remote loopback function. The received 2B channels from the S interface are looped to
the transmitted 2B channels of S/T interface. The D channel is not looped in this loopback function.
This bit remains set, until cleared by software reset (SRST).
8.2.3 Command Register 2
Value after reset: 00h
Bits in this register act similar to that of CMDR1 register, except that the effect is on B1 or B2 channel XFIFO/RFIFO,
instead of on D channel XFIFO/RFIFO.
7
6
5
4
3
B1XRST
B1RRST
B1XEN
B1REN
B2XRST
B1XRST
B1 Channel Transmitter Reset
B1RRST
B1 Channel Receiver Reset
B1XEN
B1 Channel Transmit FIFO Enable
B1REN
B1 Channel Receive FIFO Enable
B2XRST
B2 Channel Transmitter Reset
B2RRST
B2 Channel Receiver Reset
B2XEN
B2 Channel Transmit FIFO Enable
B2REN
B2 Channel Receive FIFO Enable
CMDR2
Write
Address 02h
2
1
0
B2RRST
B2XEN
B2REN
8.2.4 Control Register
Value after reset : 00H
7
0
OPS1-0 Output Phase Delay Compensation Select1-0
These two bits select the output phase delay compensation.
OPS1
OPS0 Effect
0
0
No output phase delay compensation
0
1
Output phase delay compensation 260ns
CTL
Read/Write
Address 03h
6
0
5
0
4
0
3
0
2
0
1
0
OPS1
OPS0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
| W6694CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W66ARX-18 | 制造商:Magnecraft 功能描述: |
| W66MAF185X | 制造商:Panasonic Industrial Company 功能描述:CRT |
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