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參數(shù)資料
| 型號： | W83176R-401 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Winbond Current Mode Differential Buffer for PCI Express and SATA |
| 中文描述： | 華邦電流模式差分緩沖器，用于PCI Express和SATA |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 275K |
| 代理商： | W83176R-401 |
W83176R-401, W83176G-401
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
- II -
Table of Content-
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GENERAL DESCRIPTION ......................................................................................................... 1
PRODUCT FEATURES.............................................................................................................. 1
PIN CONFIGURATION............................................................................................................... 2
BLOCK DIAGRAM...................................................................................................................... 3
PIN DESCRIPTION..................................................................................................................... 4
5.1
Clock Outputs...........................................................................................................................4
5.2
Power Pins................................................................................................................................5
I
2
C CONTROL AND STATUS REGISTERS............................................................................... 6
6.1
Register 0: Control Register (Default: 07h).............................................................................6
6.2
Register 1: Control Register (Default: FFh).............................................................................6
6.3
Register 2: Control Register (Default: 00h).............................................................................6
6.4
Register 3: Reserved Register (Default: 00h).........................................................................7
6.5
Register 4: Winbond Chip ID – Project Code Register (Default: 11h)....................................7
6.6
Register 5: Test Register (Default: 00h)..................................................................................7
ACCESS INTERFACE................................................................................................................ 8
7.1
Block Write protocol .................................................................................................................8
7.2
Block Read protocol.................................................................................................................8
7.3
Byte Write protocol...................................................................................................................8
7.4
Byte Read protocol...................................................................................................................8
ORDERING INFORMATION....................................................................................................... 9
HOW TO READ THE TOP MARKING........................................................................................ 9
PACKAGE DRAWING AND DIMENSIONS.............................................................................. 10
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