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參數資料
型號: W83176R-401
廠商: WINBOND ELECTRONICS CORP
英文描述: Winbond Current Mode Differential Buffer for PCI Express and SATA
中文描述: 華邦電流模式差分緩沖器,用于PCI Express和SATA
文件頁數: 7/14頁
文件大小: 275K
代理商: W83176R-401
W83176R-401, W83176G-401
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
- 4 -
5. PIN DESCRIPTION
BUFFER TYPE SYMBOL
DESCRIPTION
IN
Input
OUT
Output
IN
tp120k
Latched input at power up, internal 120k
pull up.
*
Internal 120k
pull-up
#
Low Active
5.1 Clock Outputs
PIN
PIN NAME
TYPE
DESCRIPTION
4,5
SRCT_IN
SRCC_IN
IN
0.7V SRC Differential clock inputs.
8,9,12,13,16,
17,20,21,30,
29,34,33,38,
37,42,41
1
DIFT/C (0:7)
OUT
0.7V Differential clock pair outputs.
SRC_DIV
IN
For selecting input frequency divided by two, active low
6,14,15,7,
43,35,36,44
OE _(0:7)*
IN
DIFT/C (1:7) output control, 0=Tri-state, 1=Enable output,
This is internal 120K pull up.
Serial clock of I
2
C 2-wire control interface
Internal pull-up resistor 120K to VDD
Serial data of I
2
C 2-wire control interface
Internal pull-up resistor 120K to VDD
23
SCLK *
IN
24
SDATA *
I/O
26
PD#*
IN
Active low to power down the device into low power state
is stopped VCO and all output buffers, This is internal
120K pull up.
27
SRC_STOP#*
IN
Active low to stop differential output buffers, This is
internal 120K pull up.
Latched input at power up to selecting PLL Band
Width 0=HIGH, 1=LOW, This is internal 120K pull up.
28
HIGH_BW#*
IN
tp120k
46
IREF
IN
Deciding the reference current for the Differential clock
pairs. The pin was connected to the precision resistor tied
to ground to decide the appropriate current; 475 ohm is
the standard value for 0.7V differential clock output.
45
LOCK
OUT
Latched output, transitions high when PLL lock is
achieved.
1= PLL mode, 0=NORMAL buffer mode.
22
PLL/NORMAL#
IN
相關PDF資料
PDF描述
W83176G-733 Winbond Dual Bank DDR BUFFER For VIA CHIPSET
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W83176R-732 WINBOND 2DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET
W83178S 100 MHZ 3-DIMM SDRAM BUFFER
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