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參數資料
| 型號： | W83626F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | LPC-to-ISA Bridge |
| 中文描述： | 線性預測到的ISA橋 |
| 文件頁數： | 7/34頁 |
| 文件大小： | 343K |
| 代理商： | W83626F |
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LPC TO ISA BRIDGE SET
W83626F/W83626D
PRELIMINARY
Publication Release Date: Feb 2000
- 5 - Revision 0.50
LPC Interface, continued
SYMBOL
PWRDN#
PIN
24
I/O
INtu
FUNCTION
Power Down. The signal is active low according to CR 44 Bit 7and
wake-up enable by hardware setting. There are eight different
power-down states (Power down Mode 3).
ISA Interface Signals
SYMBOL
SA[19:17]
PIN
58-56
I/O
FUNCTION
OUT24
System Address Bus.
These are the upper address lines that
define the ISA’s byte granular address space (up to 1 M byte).
SA[19:17] are at an unknown state upon PCIRST#.
System Address Bus.
These are the bi-directional lower address
lines that define the ISA’s byte granular address space (up to 1 M
byte). SA[16:0] are at an unknown state upon PCIRST#.
SA[16:0]
54-51
49-46
44-41
35-31
122-1
21
119-1
14
75-71
69-67
59
OUT24
SD[15:0]
OUT24
System Data.
SD[15:0] provide the 16-bit data path for devices
residing on the ISA Bus. The W83626F tri-states SD[15:0] during
PCIRST#.
AEN
OUT24
Address Enable.
AEN is asserted during DMA cycles. This signal
is also driven high during W83626F initiated refresh cycles. AEN is
driven low upon PCIRST#.
I/O Read.
IOR# is the command to an ISA I/O slave device that the
slave may drive data on to the ISA data bus (SD[15:0]).
I/O Write.
IOW# is the command to an ISA I/O slave device that
the slave may latch data from the ISA data bus (SD[15:0]).
I/O Channel Ready.
Resources on the ISA Bus negate IOCHRDY
to indicate that additional time (wait states) is required to complete
the cycle.
ISA System Clock.
SYSCLK is the reference clock for the ISA
bus. The SYSCLK is generated by dividing PCICLK by 3 or 4.
Reset Drive.
W83628F asserts RSTDRV to reset devices that
reside on the ISA Bus. The W83628F asserts this signal while the
PCIRST# is asserted.
16-bit I/O Chip Select.
This signal is driven by I/O devices on the
ISA Bus to indicate that they support 16-bit I/O bus cycles.
IOR#
86
OUT24
IOW#
84
OUT24
IOCHRDY
61
INt
SYSCLK
92
OUT24
RSTDRV
77
OUT24
IOCS16#
11
INt
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相關代理商/技術參數 |
參數描述 |
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| W83626F_05 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:LPC TO ISA BRIDGE SET |
| W83626G | 功能描述:IC LPC TO ISA BRIDGE 128-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| W83627DHG | 功能描述:IC I/O CONTROLLER 128-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| W83627DHG-P | 制造商:Nuvoton Technology Corp 功能描述:I/O Controller LPC Controller 128-Pin QFP 制造商:Nuvoton Technology Corp 功能描述:IC I/O CONTROLLER 128-QFN |
| W83627DHG-P(FA5B07 D) | 制造商:Nuvoton Technology Corp 功能描述:IC I/O CONTROLLER 128-QFP |
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