
W83977ATF
PRELIMINARY
Publication Release Date:April 1998
- 156
-
Revision 0.52
CRE6 (Default 0x00)
Bit 7-6: Reserved.
Bit 5-0: CIR Baud Rate Dividor. The clock base of CIR is 32KHz, so that the baud rate is 32KHZ
divided by (CIR Baud Rate Divisor+1).
CRE7 (Default 0x00)
Bit 7-3: Reserved.
Bit 2: Reset CIR Power-On function. After used CIR power-on, the software should be write
logical 1 to restart CIR power-on function.
Bit 1: Invert RX Data, When set 1, invert received data.
Bit 0: Enable Demodulation. When set 1, enable received signal to demodulation. When set 0,
disable
CRF0 (Default 0x00)
Bit 7:
CHIPPME
.
Chip
level power management enable.
= 0
disable the ACPI/Legacy and the auto power management functions
= 1
enable the ACPI/Legacy and the auto power management functions.
Bit 6:
IRPME
.
IR
power management enable.
= 0
disable the auto power management function.
= 1
enable the auto power management function provided CRF0.bit7
(CHIPPME) is also set to 1.
Bit 5 - 4: Reserved. Return zero when read.
Bit 3:
PRTPME
.
Printer port
power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions provided
CRF0.bit7 (CHIPPME) is also set to 1.
Bit 2:
FDCPME
.
FDC
power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions provided
CRF0.bit7 (CHIPPME) is also set to 1.
Bit 1:
URAPME
.
UART A
power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions provided
CRF0.bit7 (CHIPPME) is also set to 1.
Bit 0:
URBPME
.
UART B
power management enable.
= 0
disable the auto power management functions.
= 1
enable the auto power management functions provided
CRF0.bit7 (CHIPPME) is also set to 1.