
W88111AF/W88112F
Preliminary/Confidential
ATAPI CD-ROM Decoder & Controller
This specification is subject to change without notice.
Publication Release Date: Aug, 1996
Preliminary/ Confidential Revision A0.1
- 52 -
TARCTL - Target Control Register - (write 80h)
This register is used to control the automatic target search and header comparison. Since these
control bits are not changed by closing decoder, there is no need to write it every time before
enabling the decoder.
Bit 7: TARGEN - Target Function Enable
Setting this bit high enables target search function but does not enable decoder simultaneously.
The operation of target search is triggered by changing DECEN(0Ah.7) from low to high. Then the
decoder generates first interrupt after the decoding of target sector is finished, as specified by
Target Header Registers (84h-86h). The mode of correction is determined by the previous setting
of registers CTRL0(0Ah) and CTRL1(0Bh).
Bit 6: DSCEN - Decoding Sector Counting Enable
Setting this bit high enables the Decoding-Sector-Counter to increase by one every time the
decoding of a sector is finished. The decoder will stop and deactivate DECEN(0Ah.7) when the
value in Decoding-Sector-Counter reach the threshold value specified by Decoding-Sector-
Threshold-Register.
Bit 1: TNFEN - Target Not Found Interrupt Enable
Setting this bit high enables Target-Not-Found-Interrupt-Flag, TNFI(80h.1), to be reflected on
Decoder Interrupt Flag, DECIb (01h.5).
Bit 0: HCEEN - Header Compare Error Interrupt Enable
Setting this bit high enables Header-Compare-Error-Interrupt-Flag, HCEI(80h.0), to be reflected on
Decoder-Interrupt-Flag, DECIb (01h.5).
TARSTA - Target Status Register - (read 80h)
Bit 7: VALb - Status Valid Flag
This bit is a direct copy of flag STAVAb(0Fh.7).
Bit 6: STAERR - Status Error Flag
This bit becomes high if any status bit error occurs when its corresponding mask bit enabled. It
also deactivates DECEN (0AH.7) and stops the decoder automatically. Flag STAERR is
deactivated by reading register TARSTA (80h).