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參數(shù)資料
| 型號： | W921E840 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-Bit Microcontroller(4位的微控制器) |
| 中文描述： | 4-BIT, EEPROM, 4 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 29/64頁 |
| 文件大小： | 603K |
| 代理商： | W921E840 |
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W921E840
Publication Publication Release Date: August 1997
- 29 - Revision A1
The TM0 set register is divided into TM0 MSB data register (TM0MSB register, address = 021H,
default = 0FH) and TM0 LSB data register (TM0LSB register, address = 022H, default = 0FH).
TM0 will overflow when TM0 set register is from 00H to 0FFH and the value in the TM0MSB and
TM0LSB will be auto reloaded to the TM0 set register when the STTM0 bit2 is set. TM0 will decrease
by 1 at the frequency of timer 0 clock after timer 0 has started.
If at any time the STTM0 bit3 is from 0 to 1 (disable to enable) in the timer mode, the TM0MSB and
TM0LSB will be auto reloaded to the TM0 set register again and restart the timer 0. TM0 will stop
operating while the STTM0 bit3 is reset to 0.
The format of the TM0 low speed register (TM0LSR) is described below:
TM0LSR register: (address = 024H, default data = 0H, only for W921E841, 843, 844)
b3
b2
b1
b0
b1
b0
Input frequency (f )
0
0
0
1
1
0
1
1
fsys/2 Hz
fsys/256 Hz
fsys/1024 Hz
fsys/2048 Hz
Reserved
Reserved
SYS1
The TM0 starts to down count when the STTM0 register bit3 is set. When TM0 overflows, the STTM0
bit3 will be reset by hardware to stop TM0 if the auto-reload is disabled, but the STTM0 bit3 will not
be reset if the auto-reload is enabled.
When the TM0 normal function is performed, the watch-dog timer function will be disabled
automatically.
The format of the TM0 status register (STTM0) is described below:
STTM0 register: (address = 023H, default data = 0H)
b3
b2
b1
b0
0:TM0 stop
1:TM0 start
0:TM0 normal function selected
1:Watch-dog timer (WDT) selected
0:WDT not overflow
1:WDT overflow
0:TM0 auto-reload disable
1:TM0 auto-reload enable
If TM0 works as the watch-dog timer (WDT), the bit1 of the STTM0 register will be set when the WDT
is overflow, in the meanwhile, the system is reset just as with power on reset except the STTM0 bit1.
The WDT (STTM0 bit1) will be reset to zero only with the power on reset or the RAM write mode.
In the timer mode or event counter mode the time out will be the programming data add 1 ([TM0MSB,
TM0LSB]+1). It is the same in the TM1, TM2 and TM3.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W921E840A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT MICROCONTROLLER |
| W921E843A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT MICROCONTROLLER |
| W921E880 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT MICROCONTROLLER |
| W921E880A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT MICROCONTROLLER |
| W925C240 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telephone Controller |
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