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參數資料
| 型號： | W942508CH |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| 中文描述： | 8米× 4銀行× 8位DDR SDRAM |
| 文件頁數： | 6/47頁 |
| 文件大小： | 1317K |
| 代理商： | W942508CH |
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W942508CH
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5. PIN DESCRIPTION
PIN NUMBER
PIN NAME
FUNCTION
DESCRIPTION
28
32,
35
42
A0
A12
Address
Multiplexed pins for row and column address.
Row address: A0
A12.
Column address: A0
A9. (A10 is used for Auto Precharge)
26, 27
BS0, BS1
Bank Select
Select bank to activate during row address latch time, or bank
to read/write during column address latch time.
2, 5, 8, 11, 56,
59, 62, 65
DQ0
DQ7
Data Input/
Output
The DQ0 – DQ7 input and output data are synchronized with
both edges of DQS.
51
DQS
Data Strobe
DQS is Bi-directional signal. DQS is input signal during write
operation and output signal during read operation. It is Edge-
aligned with read data, Center-aligned with write data.
24
CS
Chip Select
Disable or enable the command decoder. When command
decoder is disabled, new command is ignored and previous
operation continues.
23, 22, 21
RAS , CAS ,
WE
Command
Inputs
Command inputs (along with
CS
) define the command being
entered.
47
DM
Write Mask
When DM is asserted
"
high
"
in burst write, the input data is
masked. DM is synchronized with both edges of DQS.
45, 46
CLK,
CLK
Differential
Clock Inputs
All address and control input signals are sampled on the
crossing of the positive edge of CLK and negative edge of
CLK
.
44
CKE
Clock Enable
CKE controls the clock activation and deactivation. When CKE
is low, Power Down mode, Suspend mode, or Self Refresh
mode is entered.
49
V
REF
Reference
Voltage
V
REF
is reference voltage for inputs.
1, 18, 33
V
DD
Power (+2.5) Power for logic circuit inside DDR SDRAM.
34, 48, 66
V
SS
Ground
Ground for logic circuit inside DDR SDRAM.
3, 9, 15, 55, 61
V
DDQ
Power (+2.5V)
for I/O Buffer
Separated power from V
DD
, used for output buffer, to improve
noise.
6, 12, 52, 58, 64
V
SSQ
Ground for I/O
Buffer
Separated ground from V
SS
, used for output buffer, to improve
noise.
4, 7, 10, 13, 14,
16, 17, 19, 20,
25, 43, 50, 53,
54, 57, 60, 63
NC1, NC2
No Connection No connection
相關PDF資料 |
PDF描述 |
|---|---|
| W942508CH-5 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-6 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-7 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-75 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942516CH | 4M X 4 BANKS X 16 BIT DDR SDRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W942508CH-5 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-6 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-7 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-75 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942516AH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M x 4 BANKS x 16 BIT DDR SDRAM |
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