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參數(shù)資料
| 型號： | W986408BH |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 2M words x 8 bit x 4 Banks SDRAM(2M字 x 8 位 x 4 組同步動態(tài)RAM) |
| 中文描述： | 200萬字× 8位× 4個銀行的SDRAM（200萬字× 8位× 4組同步動態(tài)RAM）的 |
| 文件頁數(shù)： | 3/44頁 |
| 文件大小： | 1858K |
| 代理商： | W986408BH |
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W986408BH
2M x 8 bit x 4 Banks SDRAM
Revision 1.2 Publication Release Date: April, 1999
- 3 -
Pin Assignment
Pin Number
23 ~ 26, 22,
29 ~35
Pin Name
Function
Description
A0~ A11
Address
Multiplexed pins for row and column address.
Row address : A0 ~ A11. Column address: A0 ~ A8.
Select bank to activate during row address latch time, or bank
to read/write during address latch time.
20, 21
BS0, BS1
Bank Select
2, 5, 8, 11,
Data Input/
Output
Multiplexed pins for data output and input.
19
CS#
Chip Select
Disable or enable the command decoder. When command
decoder is disabled, new command is ignored and previous
operation continues.
Command input. When sampled at the rising edge of the clock,
RAS#, CAS# and WE# define the operation to be executed.
18
RAS#
Row Address
Strobe
Column Address
Strobe
Write Enable
17
CAS#
Referred to RAS#
16
WE#
Referred to RAS#
The output buffer is placed at Hi-Z(with latency of 2) when DQM
is sampled high in read cycle. In write cycle, sampling DQM
high will block the write operation with zero latency.
System clock used to sample inputs on the rising edge of clock.
CKE controls the clock activation and deactivation. When CKE
is low, Power Down mode, Suspend mode, or Self Refresh
mode is entered.
Power for input buffers and logic circuit inside DRAM.
Ground for input buffers and logic circuit inside DRAM.
Separated power from V
cc
, used for output buffers to improve
noise.
Separated ground from V
ss
, used for output buffers to improve
noise.
39
DQM
input/output mask
38
CLK
Clock Inputs
37
CKE
Clock Enable
1, 14, 27
28, 41, 54
V
cc
V
ss
Power ( +3.3 V )
Ground
Power ( + 3.3 V )
for I/O buffer
Ground for I/O
buffer
3, 9, 43, 49
V
cc
Q
6, 12, 46, 52
V
ss
Q
4, 7, 10, 13,
15, 36, 40, 42,
45, 48, 51
NC
No Connection
No connection
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W986408CH | 2M x 8BIT x 4 BANKS SDRAM |
| W986408CH-75 | x8 SDRAM |
| W986408CH-8H | x8 SDRAM |
| W986416AH | 1M words x 16 bit x 4 Banks SDRAM(1M字 x 16 位 x 4 組同步動態(tài)RAM) |
| W986416BH | 1M words x 16 bit x 4 Banks SDRAM(1M字 x 16 位 x 4 組同步動態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W986408CH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M x 8BIT x 4 BANKS SDRAM |
| W986408CH-75 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x8 SDRAM |
| W986408CH-8H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x8 SDRAM |
| W986416CH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M x 16 BIT x 4 BANKS SDRAM |
| W986416CH-6 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x16 SDRAM |
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