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參數資料
| 型號： | WFP6540B |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 顯示驅動器 |
| 英文描述： | 258-Channel, 6-Bit Signal Driver for XGA COG（chip-on-glass）TFT-LCDs Applications(用XGA COG TFT型液晶顯示器的258通道的，6位信號驅動器) |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC305 |
| 封裝： | DIE-305 |
| 文件頁數： | 21/25頁 |
| 文件大小： | 648K |
| 代理商： | WFP6540B |
21
1999 Winbond Electronics Corporation
October 5, 1999
Rev. 0.01
WFP6540B
258-Channel COG Signal Driver for XGA TFT-LCDs
6.4
AC Characteristics (
V
DDD
= 3.3 V ± 0.3 V
)
–
(Preliminary data – subject to change)
See Figures 6-1 to 6-3 for waveforms.
Conditions: V
DDA
= 5.0 V ± 0.5 V, T
A
= 25° C
Symbol
Parameter
Min
Typical
Max
Units
Note
f
CLK
Guaranteed DCLK frequency
65
MHz
t
CLK
DCLK period
15.4
ns
t2x
CLK
DCLK period (2xCLK mode)
30.8
ns
t
1
DCLK high pulse width
6
ns
t
2
DCLK low pulse width
6
ns
t
3
DCLK, LP rise time
10
ns
t
4
DCLK, LP fall time
10
ns
t
5
Data, DATA_INV setup time to
DCLK Falling Edge
4
ns
t
6
Data, DATA_INV hold time from
DCLK Falling Edge
8
ns
t
7
LP high pulse width
50
ns
2
t
8
Enable-In setup time to DCLK
4
ns
t
9
Enable-Out low delay from DCLK
10
ns
1
t
10
DCLK low LP high
50
ns
t
11
LP low to DCLK high
50
ns
t
12
Data, DATA_INV setup time to
DCLK Rising Edge
4
ns
t
13
Data, DATA_INV hold time from
DCLK Rising Edge
8
ns
NOTES:
1)
C
LOAD
= 15 pF (See Figure 6-4)
LP width should not be wider than necessary since outputs don’t drive
to the next value until LP is low.
2)
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