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參數資料
| 型號： | AD7854L |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit Sampling ADC(單電源,200kSPS 12位采樣A/D轉換器) |
| 中文描述： | 12位采樣ADC（單電源，速度高達200ksps的12位采樣的A / D轉換器） |
| 文件頁數： | 25/28頁 |
| 文件大小： | 268K |
| 代理商： | AD7854L |
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AD7854/AD7854L
REV. 0
–25–
AD7854/AD7854L to DSP5600x
Figure 41 shows a parallel interface between the AD7854/
AD7854L and the DSP5600x series of DSPs. T he AD7854/
AD7854L should be mapped into the top 64 locations of Y data
memory. If extra wait states are needed in this interface, they
can be programmed using the Port A bus control register (please
see
DSP5600x User’s Manual
for details). Data can be read
from the DSP5600x using the following instruction:
MOVE Y:ADCaddr, X
0
Data can be written to the AD7854/AD7854L using the follow-
ing two instructions:
MOVE X 0, Y:ADCaddr
MOVE X 1, Y:ADCaddr+
1
Where
ADCaddr
is the address in the DSP5600x address space
to which the AD7854/AD7854L has been mapped.
DSP56000/
DSP56002*
A15–A1
X/
Y
A0
WR
IRQ
D23–D0
CS
HBEN
WR
RD
BUSY
DB11–DB0
AD7854/
AD7854L*
ADDR
DECODE
ADDRESS BUS
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY
RD
DS
Figure 41. AD7854/AD7854L to DSP5600x Parallel Interface
AD7854/AD7854L to T MS320C30
Figure 40 shows a parallel interface between the AD7854/
AD7854L and the T MS320C3x family of DSPs. T he
AD7854/AD7854L is interfaced to the Expansion Bus of the
T MS320C3x. T wo wait states are required in this interface.
T hese can be programmed using the WT CNT bits of the
Expansion Bus Control register (see
TMS320C3x Users Guide
for details). Data from the AD7854/AD7854L can be read
using the following instruction:
LDI *ARn,Rx
Data can be loaded into the AD7854/AD7854L using the
instructions:
STI Ry,*ARn++
STI Rz,*ARn--
where
ARn
is an auxiliary register containing the lower 16 bits
of the address of the AD7854/AD7854L in the T MS320C3x
memory space,
Rx
is the register into which the ADC data is
loaded during a load operation,
Ry
contains the 8 L SBs of
data and
Rz
contains the 8 MSBs of data to be written to the
AD7854/AD7854L.
TMS320C30*
XA12–XA1
XA0
IOSTRB
XR/
W
INT
x
XD23–XD0
CS
HBEN
WR
RD
BUSY
DB11–DB0
AD7854/
AD7854L*
ADDR
DECODE
EXPANSION ADDRESS BUS
EXPANSION DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 40. AD7854/AD7854L to TMS320C30 Parallel
Interface
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| AD7854LARS | 功能描述:IC ADC 12BIT PARALLEL LP 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率（每秒）:3M 數據接口:- 轉換器數目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:- |
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