
The Western Design Center, Inc.
W65C02S Data Sheet
The Western Design Center, Inc. W65C02S Data Sheet
19
4.13
Zero Page Indexed with X zp,x
With Zero Page Indexed with X addressing mode, the X Index Register is added to the second byte of instruction to form the
effective address.
Byte:
2
Instruction:
Base Address:
Operand Address:
4.14
Zero Page Indexed with Y zp, y
With Zero Page Indexed with Y addressing, the second byte of the instruction is the zero page address to which the Y Index
Register is added to form the page zero effective address.
Byte:
2
Instruction:
Base Address:
Operand Address:
4.15
Zero Page Indirect (zp)
With Zero Page Indirect addressing mode, the second byte of the instruction is a zero page indirect address that points to the
low byte of a two byte effective address.
Byte:
2
Instruction:
Indirect Address:
Operand Address:
4.16
Zero Page Indirect Indexed with Y (zp), y
The Zero Page Indirect Indexed with Y addressing mode is often referred to as Indirect Y. The second byte of the instruction
points to the low byte of a two byte (16-bit) base address in page zero. Y Index Register is added to the base address to form
the effective address.
Byte:
2
Instruction:
Indirect Base Address:
Operand Address:
1
zp
0
OpCode
zp
X
+
0
effective address
1
zp
0
OpCode
zp
Y
+
0
effective address
1
zp
0
0
OpCode
zp
indirect address
1
zp
0
0
OpCode
zp
indirect base address
+
effective address
Y