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參數資料
| 型號： | W83194R-67A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | XO, clock |
| 英文描述： | 100MHZ 3-DIMM CLOCK FOR VIA MVP4 |
| 中文描述： | 124 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數： | 7/18頁 |
| 文件大?。?/td> | 237K |
| 代理商： | W83194R-67A |
W83194R-67A
PRELIMINARY
Publication Release Date: Feb. 1999
Revision 0.30
- 7 -
Bytes sequence order for I
2
C controller :
Clock Address
A(6:0) & R/W
Ack
8 bits dummy
Command code
Ack
8 bits dummy
Byte count
Ack
Byte0,1,2...
until Stop
Set R/W to 1 when read back the data sequence is as follows :
Clock Address
A(6:0) & R/W
Ack
Byte 0
Ack
Ack
Byte2, 3, 4...
until Stop
Byte 1
8.3 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the default state at
true power up. "Command Code" byte and "Byte Count" byte must be sent following the
acknowledge of the Address Byte. Although the data (bits) in these two bytes are considered "don't
care", they must be sent and will be acknowledge. After that, the below described sequence
(Register 0, Register 1, Register 2, ....) will be valid and acknowledged.
8.3.1 Register 0: CPU Frequency Select Register (default = 0)
Bit
@PowerUp
Pin
Description
7
0
-
0 =
ó
0.25% Center type Spread Spectrum Modulation
1 =
ó
0.5% Center type Spread Spectrum Modulation
SSEL2 (for frequency table selection by software via I
2
C)
SSEL1 (for frequency table selection by software via I
2
C)
SSEL0 (for frequency table selection by software via I
2
C)
6
0
-
5
0
-
4
0
-
3
0
-
0 = Selection by hardware
1 = Selection by software I
2
C - Bit 2, 6:4
SSEL3 (for frequency table selection by software via I
2
C)
2
0
-
1
0
-
0 = Normal
1 = Spread Spectrum enabled
0
0
-
0 = Running
1 = Tristate all outputs
相關PDF資料 |
PDF描述 |
|---|---|
| W83194R-67B | 100MHZ 3-DIMM Clock For Via MVP4(用于主流通路芯片組的頻率為100MHZ的三雙列直插存儲模塊式時鐘) |
| W83194R | 166MHZ CLOCK FOR SIS CHIPSET |
| W83194R-630A | 166MHZ CLOCK FOR SIS CHIPSET |
| W83195AR-25 | 200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET |
| W83195BR-S | STEPLESS 200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W83194R-67A/-67B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:133MHz(Adding 97MHz) VIA MVP4 Clock Gen.. 3-DIMM. with S.S.T. |
| W83194R-67B | 制造商:WINBOND 制造商全稱:Winbond 功能描述:100MHZ 3-DIMM CLOCK FOR VIA MVP4 |
| W83194R-81 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:100MHZ CLOCK FOR SIS CHIPSET |
| W83194R-KX | 制造商:WINBOND 制造商全稱:Winbond 功能描述:133MHZ 3-DIMM K7 CLOCK |
| W83194R-WE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU SYSTEM CLOCK GENERATOR|CMOS|SSOP|48PIN|PLASTIC |
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