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參數(shù)資料
| 型號： | W83759A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ADVANCED VL-IDE DISK CONTROLLER |
| 中文描述： | 先進的VL - IDE磁盤控制器 |
| 文件頁數(shù)： | 31/41頁 |
| 文件大小： | 334K |
| 代理商： | W83759A |
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W83759A
Publication Release Date: May 1995
- 31 -
Revision A1
Table 7. PIO Command Pulse and Cycle Timing, continued
SP1
MD1
MD0
IDE WRITE
ACTIVE PULSE
IDE READ
ACTIVE PULSE
READ/WRITE
CYCLE TIME
IDE MODE
SELECT
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
8 (240)
4 (120)
9 (180)
9 (180)
7 (140)
6 (120)
9 (270)
5 (150)
10 (200)
10 (200)
8 (160)
7 (140)
13 (390)
9 (270)
31 (620)
27 (540)
19 (380)
13 (260)
Mode 1
Mode 2
Mode 0
Mode 0+
Mode 1
Mode 2
Note: It is recommended that SP be set to 0 when LCLK is 33 MHz. The initial default value is SP1 = 0. The timing value (nS) is
based on LCLK = 20 nS when SP1 = 1 and LCLK = 30 nS when SP1 = 0.
Table 8. PIO Command Pulse and Cycle Timing (W83759A mode)
Unit: LCLK
SP1
EMD1
EMD0
IDE WRITE
ACTIVE PULSE
IDE READ
ACTIVE PULSE
READ/WRITE
CYCLE TIME
IDE MODE
SELECT
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
4 (120)
3 (90)
3 (90)
2 (60)
4 (80)
4 (80)
3 (60)
2 (40)
5 (150)
4 (120)
4 (120)
3 (90)
5 (100)
5 (100)
4 (80)
3 (60)
8 (240)
6 (180)
6 (180)
4 (120)
11 (220)
9 (180)
7 (140)
5 (100)
Mode 2
Mode 3
Mode 3
Mode 4
Mode 2
Mode 3
Mode 4-
Mode 4+
Note: It is recommended that SP be set to 0 when LCLK is 33 MHz. The initial default value is SP1 = 0. The timing value (nS) is
based on LCLK = 20 nS when SP1 = 1 and LCLK = 30 nS when SP1 = 0.
Prefetch Control
The W83759A IDE command prefetch feature provides concurrent operations by pipelined read-
ahead of the next data word(s) from the drive while the host is transferring previously requested disk
data into system memory. This reduces the amount of time that the host must pause and wait for data
to be accessed. While the host is writing data to memory, the W83759A reads data from the disk
drive. As soon as the host reads the W83759A data, new data are requested by the W83759A from
the disk drive. This prefetch feature is active only for disk data at the 1F0h and 170h IO addresses
and does not oprate on other disk register data.
Power-saving Control
The W83759A provides three power-saving modes. In the initial-level power-saving mode, all of the
drive's control, address, data, and other signals enter a logic 1 standby state when no IDE disk cycle
is active. This reduces unnecessary power use and decreases the amount of EMI radiation generated
by driving the long IDE cable continuously.
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