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參數(shù)資料
型號: W83759A
廠商: WINBOND ELECTRONICS CORP
英文描述: ADVANCED VL-IDE DISK CONTROLLER
中文描述: 先進(jìn)的VL - IDE磁盤控制器
文件頁數(shù): 6/41頁
文件大小: 334K
代理商: W83759A
W83759A
- 6 -
Pin Description, continued
SYMBOL
PIN
TYPE
DESCRIPTION
RDYRTN
94
I
Ready return.
An active low signal that indicates the end of the current host
CPU transfer.
Usually
RDYRTN
is tied directly to the
RDY
signal of the host
CPU.
HA[9:2]
10-3
I
Host address bits 9 through 2 from the host address bus.
HD[31:0]
11
14
19
39
42
45
I/O
Host data.
This is the 32-bit bidirectional data bus that connects to the host
CPU. HD[7:0] define the lowest data byte, while D[31:24] define
the most significant byte by the
normally in a high-impedance state and is driven by the
W83759A only during data register (1F0h or 170h) read cycles
and VGA (
VGAOEH
= 0 or
VGAOEL
= 0) read cycles.
BE 2:0 signals. The HD bus is
Drive Interface
PRDYEN
/
IDE0CS0
61
I/O
-PU
When
SYSRST
is active, this is an input that latches on the
rising edge of
SYSRST
.
PRDYEN: A high input enables the IORDY flow control function of
the primary channel (IDE0) and a low input disables the IDE0's
flow control function.
IDE0CS0
: When
SYSRST
is inactive, this pin is an active low
output used to select the command block registers in the IDE0
drive (1F0h
1F7h).
SRDYEN
/
IDE0CS1
62
I/O
-PU
When
SYSRST
is active, this is an input that latches on the
rising edge of
SYSRST
.
SRDYEN: A high input enables the IORDY flow control function of
the secondary channel (IDE1) and a low disables the IDE1's flow
control function.
IDE0CS1
: When
SYSRST
is inactive, this pin is an active low
output used to select the alternate status register of the control
block registers in the IDE0 drive (3F6).
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