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參數資料
| 型號： | W83769 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | LOCAL BUS IDE SOLUTION |
| 中文描述： | 局部總線IDE解決方案 |
| 文件頁數： | 5/21頁 |
| 文件大小： | 163K |
| 代理商： | W83769 |
W83769
Publication Release Date: September 1994
- 5 -
Revision A1
1.7 3F7h Register Operation
The disk drive status register 3F7h is a read-only register that provides hard drive status in bits 6-0 to
the host CPU. Floppy drive status is provided as bit 7; this status indication originates from pin 34 of
the floppy drive cable. All 8 bits can be combined, buffered, and passed to the host CPU chipset as a
normal ISA bus cycle. The W83769 will detect the 3F7h address on the host address bus as an IDE
cycle but will not generate any clocked transfer cycle.
1.8 Power-Save Mode
The W83769 contains a power-save feature for notebook or green PC applications. If no IDE cycles
are in progress, the power-save circuitry forces all but the CPU tracking and address decoding logic
into a static state to reduce power consumption. This also reduces EMI radiation because the IDE
cable is inactive while the device is in power-save mode.
1.9 Reset Initialization
The first step in setting up the W83769 for operation is to reset the device using the active high
RESET pin. A reset immediately terminates any operation in progress and returns the W83769 to a
known state from which it can be initialized. Immediately following a reset, the controller determines
its operational mode via pin configuration.
If the IDEACT pin is sampled high, IDE operation will be enabled, and disk transfer cycles can be
executed. If the IDEACT pin is sampled low, IDE operation is disabled, and the controller will respond
only to configuration cycles via the general purpose I/O ports. This permits BIOS software to test the
system for installed disks and enable/disable the W83769 and specific features and operations.
1.10 Hardware Configurations
Several hardware configuration options can be defined using the DSA1 and DCS0
power-on reset:
DSA1
Digital Input Register
0
Disable
1
Enable
1
pins during the
DCS0
1
Device ID selection
(for multiple chip only)
60h
61h
62h
63h
00
01
10
11
To select the value of 0 for each bit in the above configuration, the corresponding pin needs to be
pulled down during the power-on reset. Pulling the pin up will set the value to 1.
1.11 I/O Registers
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