
W921E880A/W921C880
Publication Release Date: September 1998
- 19 -
Revision A2
PABCDTP REG: (ADDRESS = 008H)
(Default data = 0H)
b3
b2
b1
b0
0:
1:
0:
1:
0:
1:
0:
1:
PA(4PINS) work as CMOS type
PA(4PINS) work as Open-drain type
PB(4PINS) work as CMOS type
PB(4PINS) work as Open-drain type
PC(4PINS) work as CMOS type
PC(4PINS) work as Open-drain type
PD(4PINS) work as CMOS type
PD(4PINS) work as Open-drain type
* P2, P7, P9:
P279TP REG: (ADDRESS = 00DH)
(Default data = 0H)
b3
b2
b1
b0
0:
1:
0:
1:
0:
1:
P2(4PINS) work as CMOS type
P2(4PINS) work as Open-drain type
P7(4PINS) work as CMOS type
P7(4PINS) work as Open-drain type
P9(4PINS) work as CMOS type
P9(4PINS) work as Open-drain type
0:
1:
PC.3 work as normal I/O port (CMOS type)
PC.3 work as 32.768 KHz output buffer
(Open-drain Type)
6.6 Serial Port
The W921E880A/W921C880 has a clock-synchronous serial interface which transmits or receives 8-
bit data as default. The user can program the P6IO register to select port P6 as the serial port. The
serial transmitter/receiver function can be operated with a multi-nibble function where the LSB of
every nibble is being transmitted/received first.
The serial transmitted/received data is come from or stored in the serial buffer registers (address
050H to 14EH). The number of nibbles to be transmitted/received is decided by the serial MSB nibble
register (SRMNR, address = 00AH) and the serial LSB nibble register (SRLNR, address = 009H).
SRMNR register: (address = 00AH, default data = 0H)
b3
b2
b1
b0
SRLNR register: (address = 009H, default data = 2H)
b3
b2
b1
b0
The default data in the SRMNR and SRLNR registers are 0 and 2 respectively which means the
default serial interface is used to transmit/receive 8-bit data serially. As soon as these two registers
are programmed and the instructions such as SOP or SIP are executed, the serial
transmitter/receiver multi-nibble function will be performed. The transmitted/received number will be