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參數資料
型號: W921C880
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 4-Bit Microcontroller(4位微控制器)
中文描述: 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數: 38/57頁
文件大小: 372K
代理商: W921C880
W921E880A/W921C880
- 38 -
When the STOP CONDITION RELEASE FLAG (STPRF) and the INTERRUPT CONTROL REG.
(INTCT1
INTCT3) are set before the STOP instruction is executed, a low level signal on the P4, PA
or PB ports will cause the STOP MODE to be released. There will be a delay of about 256 machine
cycles after the stop mode is released. The interrupt subroutine (interrupt vector) is then executed
according to the set bit in the STPRF REG. If the interrupt enable flag is not set before the STOP
instruction is executed, then the next instruction after the STOP instruction will be executed. It also
has a delay of about 256 machine cycles before the next instruction is executed.
It should be noted that if STOP MODE is released by the PA or PB port, then the chip will execute the
(PC+1) instruction only because there is no individual interrupt subroutine in the PA and PB ports.
The control flow chart is shown as follows:
Stop Mode Operation Flow Chart
START
STOP
Enter STOP Mode
INT Enable
Yes
No
INT Vector
RTNI
PC
PC + 1
STOP
No
Yes
(Only falling signal on
INT0 or P4.0 - P4.2)
(PA, PB Ports on
low level state)
System will Delay 256
Machine Cycle
Automatically
Next
Instruction
相關PDF資料
PDF描述
W921E880A 4-Bit Microcontroller(4位微控制器)
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