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參數資料
| 型號： | W93910 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 尋呼電路 |
| 英文描述： | ERMES(Enhanced Radio Emessage System) Paging Protcol Decoder(增強的無線電子信息系統尋呼解碼器) |
| 中文描述： | TELECOM, PAGING DECODER, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數： | 8/35頁 |
| 文件大小： | 267K |
| 代理商： | W93910 |
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W93910
- 8 -
192 OPTION BITS PROGRAMMING
After power on and XRST pin active, the
μ
C should send 192 clock inputs to TXCLK pin and 192 options
to TXDATA pin. Figure 2 shows the TXCLK and TXDATA programming timing. The data values in
TXDATA are latched at TXCLK rising edge. The clock rate of TXCLK should be smaller than 1 MHz.
XRST
......
TXCLK
......
TXDATA
Ttxck
PLEN
Txrst
Ttdst
Ttdhd
Low
Ton
Tosc
OSCO
b0
b1
b189 b190 b191
ON
Figure 2. 192 option bits programming timing
RECEIVING ENABLE CONTROL
After the W93910 has received the 192 options, it will start the operation if the ON pin is high, or in
stand-by mode if ON pin is low. The On pin can be pulled high at any time to activate the oscillator. After
oscillator is stable, the decoder will activate the PLEN. RFEN, QC1, QC2, TCTL1, and TCTL2 to control
the frequency synthesizer and IF demodulator, based on the option setting as shown in Figure 3. The
frequency synthesizer need to be programmed to the right channel (normally home channel) before
PLEN active. The PLEN is used to control the frequency synthesizer power, and inform
μ
C of the
receiving status. The output levels of RFEN, PLEN, QC1 and QC2 are defined by the option bits RFENL,
PLENL, QC1L and QC2L as shown in Table 2. TCTL2 is the inversion output of QC2. The TCTL1 active
level is fixed. The TCTL1 and TCTL2 output will be activated only when the LEDF option bit is set to 1.
Option bit PL1
0, RFON, QCON1
0 and QC1WTH provides different set up time for PLEN, RFEN,
QC1, QC2, TCTL1 and TCTL2, as shown in Table 3, to meet different RF receiver requirements.
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