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參數資料
| 型號： | W9925QF-K |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | A High Performance Single-Chip VCD Decoder(高性能的單片VCD解碼器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數： | 4/11頁 |
| 文件大?。?/td> | 177K |
| 代理商： | W9925QF-K |
Preliminary
W9925QF-K
Publication Release Date: April, 1998
Revision 1.0
- 4 -
TEST0/TEST1
Testing purpose. Don't assert these bits.
HI-RES
Need to set "1" while bitstream is high-resolution pictures, otherwise set "0". If AUTORS=1, this bit is
ignored.
HIE
Enable horizontal interpolation.
FTEN
Exchanges internal top and bottom field phase. This is effective only during interlace scan.
VIE
Enables vertical interpolation.
NT2PAL
Force NTSC to PAL resizing feature when AUTORS=0. If AUTORS=1, this bit is ignored.
YSWP/USWP
To configure the video output sequence order after every HSYNC asserted:
YSWP
0
0
1
1
USWP
0
1
0
1
Output component order
Cb-Y-Cr-Y
Cr-Y-Cb-Y
Y-Cb-Y-Cr
Y-Cr-Y-Cb
Video Scan Mode Register
index: A9h
write
bit(15:7)
not used
bit(6)
SYNCP
0
bit(5)
CLKP
0
bit(4)
VCKO
0
bit(3)
I/E
0
bit(1:0)
VSM
10
xx
I/E
Selects VSYNC#, HSYNC# to be input or output mode. "0" for input mode, "1" for output mode.
When I/E=1,
VSM=00, to specify NTSC interlace scan mode, i.e. 13.5MHz/15734Hz/60Hz/262.5;
VSM=01, to specify NTSC non-interlace scan mode, i.e. 13.5MHz/15734Hz/60Hz/263;
VSM=10, to specify PAL interlace scan mode, i.e. 13.5MHz/15625Hz/50Hz/312.5;
VSM=11, to specify PAL non-interlace scan mode, i.e. 13.5MHz/15625Hz/50Hz/313.
VCKO
Sets VCLK in input or output mode. If VCKO=1, VCLK is in output mode. Otherwise VCLK is in
input mode
SYNCP
SYNCP=1 inverts VSYNC# and HSYNC# signal, regardless of input/output mode
CLKP
CLKP=1 inverts VCLK signal when VCKO=1. If VCKO=0, this bit is ignored
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