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參數資料
| 型號： | U632H16SK25G1 |
| 元件分類： | SRAM |
| 英文描述： | 2K X 8 NON-VOLATILE SRAM, 25 ns, PDSO28 |
| 封裝： | 0.300 INCH, GREEN, SOP-28 |
| 文件頁數： | 5/15頁 |
| 文件大?。?/td> | 229K |
| 代理商： | U632H16SK25G1 |
13
April 7, 2005
U632H16
Low Average Active Power
The U632H16 has been designed to draw significantly
less power when E is LOW (chip enabled) but the
access cycle time is longer than 55 ns.
When E is HIGH the chip consumes only standby cur-
rent.
The overall average current drawn by the part depends
on the following items:
1. CMOS or TTL input levels
2. the time during which the chip is disabled (E HIGH)
3. the cycle time for accesses (E LOW)
4. the ratio of READs to WRITEs
5. the operating temperature
6. the power supply voltage level
1
28
2
27
4
25
5
24
26
6
23
7
22
8
21
12
17
9
20
10
19
11
18
13
16
14
15
3
+
0.1
F
Bypas
s
100
F
± 20 %
VCAP
VSS
Power
Supply
VCCX
HSB
10 K
(optional,
Figure 1: Automatic STORE Operation
Schematic Diagram
The information describes the type of component and shall not be considered as assured characteristics. Terms of
delivery and rights to change design reserved.
1
28
2
27
4
25
5
24
26
6
23
7
22
8
21
12
17
9
20
10
19
11
18
13
16
14
15
3
0.1
F
Bypass
VCAP
VSS
Power
Supply
VCCX
HSB
10 K
(optional,
Figure 2: Disabling Automatic STORES
Schematic Diagram
VCAP
5.0 V
STORE inhibit
Power Up
VSWITCH
tRESTORE
RECALL
(24)
t
Disabling Automatic STORES: STORE Cycle Inhibit and Automatic Power Up RECALL
see description HSB
nonvolatile store)
see description HSB
nonvolatile store)
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相關代理商/技術參數 |
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