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參數(shù)資料
| 型號(hào)： | W81C280 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | USB Keyboard/ Device Controller(具有通用串行總線接口的鍵盤(pán)／設(shè)備控制器) |
| 中文描述： | 8-BIT, MROM, MICROCONTROLLER, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁(yè)數(shù)： | 16/27頁(yè) |
| 文件大小： | 328K |
| 代理商： | W81C280 |
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W81C280
Publication Release Date: July 1997
- 12 -
Revision 0.50
Control Register 3: ( RESERVED )
Control Register 4: ( RESERVED )
Control Register 5:
BIT
SYMBOL
DESCRIPTION
7
( RESERVED )
6-0
USB Address code for device.
Control Register 6:
BIT
SYMBOL
DESCRIPTION
7
CLK_SEL
Internal clock select.
1
for low speed device.
6
SYSCLK_SEL
0
for 6 MHZ ;
1
for 12 MHZ.
5
PWD_MODE
Power down Mode flag ( set
1
When chip goes into suspend mode )
4-2
( RESERVED )
1-0
( RESERVED BITs ; Should be set
0
)
6.3 Reading Data From The USB FIFOs and Registers
When data has been received by the W81C280 from USB bus, theinternal interrupt will be enabled
and the following flag in the Status Register will be set: DAVEP0.
To access this data just continue reading the FIFO by the serial bus. The data associated with the flag
stated above will be read from the W81C280. In all cases the MSB will be read first since the
W81C280 converts the USB's LSB protocol.
6.3.1 Reading from the USB's Endpoint0 FIFO
The endpoint0 FIFO is used for Control Transfers. After valid data (USB address match) is sent from
the PC to the device via USB's endpoint 0, when the CPU core reads the Status Registers it sees that
DAVEP0 is set. Therefore, when it continues to read from the W81C280 beyond Status Register 3,
the ensuing data will be the USB's endpoint 0 FIFO. Consult the USB specification for transfer types,
stages, and phases.
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