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參數資料
| 型號： | W81E381 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | 全速USB集成微控制器 |
| 文件頁數： | 12/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381 |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 12 - Revision 0.52
3.2.1 100-pin LQFP package description, continued
SYMBOL TYPE
PIN NO
DESCRIPTIONS
u
u
C
C
P
P
i
i
n
n
s
s
EA
I
96
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute
the external ROM. The ROM address and data will not be present on the
bus if the
EA
pin is high and the program counter is within the 64 KB
area. Otherwise they will be present on the bus.
UC51EN
I
97
EXTERNAL uC51 ENABLE: to enable external processor
PSEN
O H
39
PROGRAM STORE ENABLE: PSEN enables the external ROM data in
the Port 0 address/data bus.
When internal ROM access is performed, no PSEN strobe signal outputs
originate from this pin.
ALE
O H
86
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0. ALE runs at 1/6th of the
oscillator frequency. An ALE pulse is omitted during external data
memory accesses.
RST
I L
61
RESET: A high on this pin for two machine cycles while the oscillator is
running resets the device.
UC-XO
O
45
uC Crystal output.
UC-XI
I
46
uC Crystal input.
P0.0 - 7 I/O D
93,94,14,15
29,31,32,33
PORT 0: Function is the same as that of the standard 8052.
P1.0
I/O
16
It is a high drive I/O pad. Used as a GPIO pin for memory-type SC
P1.1
I/O
18
It is a high drive I/O pad. Used as a GPIO pin for memory-type SC
P1.2
I/O
19
Used as a GPIO pin for memory-type SC
P1.3
I/O
26
Used as a GPIO pin for memory-type SC
P1.4
I/O
27
Used as a GPIO pin for memory-type SC
P1.5
I/O
43
Used as a GPIO pin for memory-type SC
P1.6
I/O
51
GPIO & remote wakeup pin
P1.7
I/O
52
GPIO & external interrupt pin
P2.0 – 7 I/O H
41,42,55,56
57,59,60,84
PORT 2: Bi-directional I/O port with internal pull-ups. Also provides the
upper address bits for external memory. Can be programmed as output-
latched port as on-chip 74373, or a buffer input port as an on-chip 74244.
P3.0 - 7 I/O H
68,69,35,36
88,89,90,91
PORT 3: Function is the same as that of the standard 8052.
*Note:
TYPE
I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain, PWR: Power pins
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相關代理商/技術參數 |
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