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參數資料
型號: W83787IF
廠商: WINBOND ELECTRONICS CORP
元件分類: 外設及接口
英文描述: WINBOND I/O WITH SERIAL-INFRARED SUPPORT
中文描述: MULTIFUNCTION PERIPHERAL, PQFP100
封裝: PLASTIC, QFP-100
文件頁數: 32/123頁
文件大小: 1751K
代理商: W83787IF
W83787IF
Publication Release Date:Sep 1995
- 32 -
Revision A1
Tape Sel 1, Tape Sel 0 (Bit 1, 0):
These two bits assign a logical drive number to the tape drive. Drive 0 is not available as a tape drive
and is reserved as the floppy disk boot drive.
TAPE SEL 1
TAPE SEL 0
DRIVE SELECTED
0
0
None
0
1
1
1
0
2
1
1
3
2.3.3 Main Status Register (MS Register) (Read 3F4H/374H)
The Main Status Register is used to control the flow of data between the microprocessor and the
controller. The bit definitions for this register are as follows:
FDD 0 Busy, (D0B=1), FDD number 0 is in the SEEK mode.
FDD 1 Busy, (D1B=1), FDD number 1 is in the SEEK mode.
FDD 2 Busy, (D2B=1), FDD number 2 is in the SEEK mode.
FDD 3 Busy, (D3B=1), FDD number 3 is in the SEEK mode.
FDC Busy, (CB). A read or write command is in the process when CB= HIGH.
Non-DMA mode, the FDC is in the non-DMA mode, this bit is set only during the execution phase in non-DMA mode.
Transition to LOW state indicates execution phase has ended.
DATA INPUT/OUTPUT, (DIO). If DIO= HIGH then transfer is from Data Register to the processor.
If DIO= LOW then transfer is from processor to Data Register.
Request for Master (RQM). A high on this bit indicates Data Register is ready to send or receive data to or from the processor.
7
6
5
4
3
2
1
0
2.3.4 DATA Register (DT Register ) (R/W 3F5H/375H)
The Data Register consists of four status registers in a stack with only one register presented to the
data bus at a time. This register stores data, commands, and parameters and provides diskette-drive
status information. Data bytes are passed through the data register to program or obtain results after
a command.
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PDF描述
W83787F WINBOND I/O WITH SERIAL-INFRARED SUPPORT
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