
Preliminary W91030
Publication Release Date: May 1997
- 5 - Revision A1
Pin Descriptions, continued
PIN
16
NAME
DCLK
TYPE
I, O
DESCRIPTION
Data Clock for the FSK interface. In the FSK data output interface mode 0
(FDMODE pin low), this pin is an output with a changing FSK frequency.
In the FSK interface mode 1, this pin is an input.
Data signal for the FSK interface. Serial data output according to the FSK
frequency input in FSK data output interface mode 0 (FDMODE pin low).
Data is shifted out on the rising edge of DCLK in FSK data output interface
mode 1 with logic 1 for mark and logic 0 for space.
Data Ready of the FSK interface (Low active). In FSK interface mode 0
(FDMODE pin low), this pin identifies the 8-bit data boundary on the serial
output string. In FSK interface mode 1, this pin is used to notify the micro-
controller to extract the 8-bit data (ie. 8-bit data has been ready internally).
FSK Carrier Detect (Low active). When low, it indicates the FSK signal
has been detected.
Interrupt signal (open drain). In M-mode it is used to interrupt the
microcontroller when RNGON or FDRN are low, or if ALGO is high.
Remains low until all three signals have become inactive. In C-mode it will
go low at the end of the Alert signal detection (DET pin from high to low),
and remain low until the FSK demodulation has been enabled (FSKE pin
goes high).
Dual tone Alert signal Guard time detect Output in M-mode or Detected
output signal in C-mode. In M-mode and when high, a guard time qualified
for the dual tone alert signal has been detected. In C-mode, detecting
RNGON low, ALGO high or FCDN low will activate this pin (high).
Dual tone Alert signal Guard time Resistor. Also functions as a dual tone
alert signal detect output without guard time. An external resistor must
connected between this pin and ALGRC to implement guard time
detection.
Dual tone Alert signal Guard time RC (CMOS output and internal voltage
comparator input). An external resistor must be connected between this
pin and ALGR and an external capacitor between this pin and V
DD
to
implement guard time detection.
Power supply input.
17
DATA
O
18
FDRN
O
19
FCDN
O
20
INTN
O
21
ALGO
/DET
O
22
ALGR
O
23
ALGRC
I
24
V
DD
I
SYSTEM DIAGRAM
The W91030 device applications include telephone systems which have caller ID features and which
can display the calling message on an LCD display. Figure 5 shows the system diagram. It illustrates
how to use the chip to connect between the tip/ring and the microcontroller in the telephone system.
The ring signal is detected by the W91030 device and then an interrupt sent to the microcontroller.
The ring detected signal will also be directed to the ringer circuit. The data can be decoded by the
microcontroller and displayed on the LCD display. The DTMF ACK signal can also be generated by
the DTMF generator if a call on waiting is performed. Other functions are the same as the telephone
set.