
January 27, 2000
Rev. 0.02
1999 Winbond Electronics Corporation
7
WFP6852A
300-Channel 6-Bit Signal Driver
7.
DETAILED PAD DESCRIPTIONS & OUTPUT VOLTAGE RELATIONSHIP
The following abbreviations are used for pad types in the following sections: (I) input;
(O) output; (I/O) Input/Output, (#) active ‘low’ signal.
Name
Pad #
Type
Description
LD1_300
9
I
LOAD DIRECTION:
Controls the direction in which the data
is loaded into the Input Register:
When LD1_300 = ‘1’, data is loaded from Channel
V
S1
to V
S300
.
When LD1_300 = ‘0’, data is loaded from Channel
V
S300
to V
S1
.
EIO1, EIO300
21,17
I/O
ENABLE IN/OUT
: The EIO1 and EIO300 are active high sig-
nals that initiate the loading of data into the Input Register of
the WFP6852A. When one of the EIOx ‘s is configured as an
input, the other is configured as an output, with the direction
determined by the LD1_300 input (see Table 7-1). The EIOx
outputs are designed to be connected to the EIOx inputs of
adjacent devices to allow a series of drivers to operate
sequentially. When a high is applied to the EIOx pin config-
ured as an input on the first device in the series, data is
loaded from the three sets of 6-bit Data Inputs into the first
three 6-bit Input-Register locations. On subsequent transi-
tions of the DCLK, data continues to be loaded into the
remaining 6-bit Input-Register locations. When the register
is full (100 DCLK’s if 2xCLK = low), the EIOx pin configured
as an output goes high, enabling the next driver. The data
load sequence is summarized in Table 7-1 and Figure 7-1.
Table 7-1: Input/Output Selection for EIO1 and EIO300
LD1_300
Input
EIO1, EIO300 Functionality
Data Loading Sequence
EIO1
EIO300
‘1’
Input
Output
Channel 1 to 300
‘0’
Output
Input
Channel 300 to 1