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參數(shù)資料
| 型號： | W79E201A16PN |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LCC-44 |
| 文件頁數(shù)： | 27/87頁 |
| 文件大小： | 818K |
| 代理商： | W79E201A16PN |
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W79E201
Publication Release Date: December 16, 2004
- 27 -
Revision A2
1
EWT
Enable Watchdog timer Reset. Setting this bit will enable the Watchdog timer
Reset function.
Reset Watchdog Timer. This bit helps in putting the watchdog timer into a know
state. It also helps in resetting the watchdog timer before a time-out occurs.
Failing to set the EWT before time-out will cause an interrupt, if EWDI (EIE.4) is
set, and 512 clocks after that a watchdog timer reset will be generated if EWT is
set. This bit is self-clearing by hardware.
0
RWT
The WDCON SFR is set to a 0x0x0xx0b on an external reset. WTRF is set to a 1 on a Watchdog timer
reset, but to a 0 on power on/down resets. WTRF is not altered by an external reset. POR is set to 1
by a power-on reset. EWT is set to 0 on a Power-on reset and unaffected by other resets.
All the bits in this SFR have unrestricted read access. POR, EWT, WDIF and RWT require Timed
Access procedure to write. The remaining bits have unrestricted write accesses. Please refer TA
register description.
TA
EG
C7H
WDCON
REG
D8H
CKCON
REG
8EH
MOV
TA, #AAH
MOV
TA, #55H
SETB WDCON.0
; Reset watchdog timer
ORL
CKCON, #11000000B
; Select 26 bits watchdog timer
MOV
TA, #AAH
MOV
TA, #55H
ORL
WDCON, #00000010B
; Enable watchdog
PWM Prescale Register
Bit:
7
6
5
4
3
2
1
0
PWMP.7 PWMP.6 PWMP.5 PWMP.4 PWMP.3 PWMP.2 PWMP.1 PWMP.0
Mnemonic: PWMP
Address: D9h
PWM 0 Register
Bit:
7
6
5
4
3
2
1
0
PWM0.7 PWM0.6 PWM0.5 PWM0.4 PWM0.3 PWM0.2 PWM0.1 PWM0.0
Mnemonic: PWM0
Address: DAh
PWM 1 Register
Bit:
7
6
5
4
3
2
1
0
PWM1.7 PWM1.6 PWM1.5 PWM1.4 PWM1.3 PWM1.2 PWM1.1 PWM1.0
Mnemonic: PWM1
Address: DBh
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