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參數(shù)資料
| 型號： | W83196S-14 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | XO, clock |
| 英文描述： | 100 MHZ Clock For BX Chipset(2 Chip)(用于BX型芯片組的頻率為100MHZ的時鐘) |
| 中文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大小： | 217K |
| 代理商： | W83196S-14 |
Preliminary W83196S-14
Publication Release Date: March 1999
Revision A1
- 7 -
(II) Default Frequency table selection by software via I
2
C (When Register 7 Bit 0 = 1)
SSEL2
0
0
0
0
SSEL1
0
0
1
1
SSEL0
0
1
0
1
CPU, SDRAM (MHZ)
124
150
140
133
PCI (MHZ)
41.3 (CPU/3)
37.5 (CPU/4)
35 (CPU/4)
33.3 (CPU/4)
REF2X (MHZ)
14.318
14.318
14.318
14.318
FUNCTION TABLE
FUNCTION
Description
Tri-State
Normal
OUTPUTS
CPU
Hi-Z
See table
PCI
Hi-Z
REF2X
Hi-Z
14.318
IOAPIC
Hi-Z
14.318
See table
7.3.2 Register 4 : CPU , 48/24 MHz Clock Register (1 = Enable, 0 = Stopped)
BIT
7
6
5
4
3
2
1
0
@POWERUP
0
1
0
0
0
1
0
1
PIN
-
14
-
-
-
21
-
22
DESCRIPTION
Reserved
24/48 MHz (Active/Inactive)
Reserved
Reserved
Reserved
CPUCLK1 (Active/Inactive)
Reserved
CPUCLK_F (Active/Inactive)
7.3.3 Register 5: PCI Clock Register (1 = Enable, 0 = Stopped)
BIT
7
6
5
4
3
2
1
0
@POWERUP
1
1
1
0
1
1
1
1
PIN
4
11
10
-
8
7
6
5
DESCRIPTION
PCICLK_F (Active/Inactive)
PCICLK6 (Active/Inactive)
PCICLK5 (Active/Inactive)
Reserved
PCICLK4 (Active/Inactive)
PCICLK3 (Active/Inactive)
PCICLK2 (Active/Inactive)
PCICLK1 (Active/Inactive)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W83301DR-O | ACPI-STR Controller |
| W83301 | SUBMINIATURE POWER RELAY |
| W83301R | SUBMINIATURE PC BOARD RELAY |
| W83601R | Winbond SMBus GPI/O |
| W83601R602R | WINBOND GPI/O IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W83196S-14/-14A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100/133/150/160MHz Clock Gen.. with S.S.T.? |
| W83301 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ACPI-STR Controller |
| W83301DR-O | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ACPI-STR Controller |
| W83301R | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ACPI-STR Controller |
| W83303AD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:Advanced ACPI Controller |
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