- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄363904 > W88113CF (WINBOND ELECTRONICS CORP) ATAPI CD-ROM DECODER & CONTROLLER PDF資料下載
參數(shù)資料
| 型號： | W88113CF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | ATAPI CD-ROM DECODER & CONTROLLER |
| 中文描述： | IDE COMPATIBLE, CD ROM CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 58/102頁 |
| 文件大小： | 573K |
| 代理商： | W88113CF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當(dāng)前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁
W88113C
Publication Release Date: Mar. 1999
- 54 - Revision 0.61
Bit 1: reserved
Bit 0: RMSRI - Remove Frequent SRIb
If
RMSRI (5Ch.0)
is high, flag
SRIb (01h.r5)
is generated only by flags
STAERR (80h.r6)
,
DSFULI (80h.r4)
,
LASTBK (80h.r3)
,
LTTI (80h.r2)
,
TNFI (80h.r1)
or
HCEI (80h.r0)
. Setting
this bit high can reduce the overhead of microcontroller while the automatic cache
management is used. This bit is 0 after chip reset, host reset and firmware reset.
LSUBH2 - Latched Subheader 2 Register - (read 5Dh)
The content of Subheader-2-Register(16h) is latched into this register at the end of EDC check. This
value is available to the end of next EDC check.
PSKCNT - Programmable System Clock Internal Counter (read 5Eh)
Bit 4-0 of this register hold the internal counter of programmable clock system. This value can be
read for ststem debug.
GIOCTL - General I/O Port Control Register - (read/write 5Fh)
Pin HRSTb (21)
can be configured as GIO1 by
HRSTS1-0 (2Fh.5-4)
.
Pin ARSTb (60)
can be
configured as GIO2 by
ARSTS1-0 (2Fh.3-2)
. This register is 0 after chip reset.
Bit 7-6: reserved
Bit 5: G2OEN - General I/O Port 2 Output Enable
Setting this bit high configure GIO2 as output. Otherwise, it is an input pin.
Bit 4: G1OEN - General I/O Port 1 Output Enable
Setting this bit high configure GIO1 as output. Otherwise, it is an input pin.
Bit 3: reserved
Bit 2: GIN3 - General Input Port 3
The pin state of
URS (32)
can be read back from this bit if
DRA (5Bh.1)
is high and
DA0EN
(87h.7)
is low.
Bit 1: GIO2 - General I/O Port 2
If GIO2 is configured as an input pin, the pin state can be read back from this bit. If GIO2 is
configured as an output pin, set this bit low drive GIO2 low and set this bit high cause a weak
pull-up.
Bit 0: GIO1 - General I/O Port 1
If GIO1 is configured as an input pin, the pin state can be read back from this bit. If GIO1 is
configured as an output pin, set this bit low drive GIO1 low and set this bit high cause a weak
pull-up.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W88227F | ATAPI CD-ROM Decoder(支持ATAPI標(biāo)準的CD-ROM解碼器) |
| W88227QD | ATAPI CD-ROM Decoder(支持ATAPI標(biāo)準的CD-ROM解碼器) |
| W88611P | VCD 4X RF Amplifer/Digital Servo & DSP(具有射頻運算放大器及數(shù)字信號伺服和處理的集成芯片) |
| W88631F | VCD 4X RF Amplifer/Digital Servo & DSP(具有射頻運算放大器及數(shù)字信號伺服和處理的集成芯片) |
| W89C840AF | 100/10Mbps Ethernet Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W88611P | 制造商:WINBOND 制造商全稱:Winbond 功能描述:VCD 4X RF AMP/DIGITAL SERVO & DSP |
| W88631F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:VCD 4X RF AMP/DIGITAL SERVO & DSP |
| W88980 | 制造商:Performance Tool 功能描述:Anti-Fatigue Floor Mat Roll - 12 Square Feet 制造商:PERFORMANCE TOOLS 功能描述:ANTI-FATIGUE FLOOR MAT ROLL 12 SQ FT |
| W88981 | 制造商:Performance Tool 功能描述:Anti-Fatigue Floor Mat Roll - 32 Square Feet 制造商:PERFORMANCE TOOLS 功能描述:ANTI-FATIGUE FLOOR MAT ROLL 32 SQ FT |
| W88ACPX-1 | 制造商:Struthers-Dunn 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。