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參數資料
型號: W89C841F
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 3-IN - 1 10/100M FAST ETHERNET CONTROLLER
中文描述: 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128
封裝: 14 X 20 X 2.75 MM, QFP-128
文件頁數: 76/102頁
文件大小: 1154K
代理商: W89C841F
W89C841F/D
- 76 -
Ddc/DRFCTV RXDMA Flow Control Threshold Value
BIT
ATTRIBUTE
BIT NAME
DESCRIPTION
31:18
R
---
Reserved. Fixed to 0.
17:9
R/W
HTV
High Threshold Value
When the receive byte count in the RX FIFO is greater than
high threshold value, a pause packet with MAX pause time
will be transmitted if bit TFCEN of register C1c/CNCR is set.
Default value: 9’h180
8:0
R/W
LTV
Low Threshold Value
When the receive byte count in the RX FIFO is less than low
threshold value, a pause packet with MIN pause time will be
transmitted if bit TFCEN of register C1c/CNCR is set.
Default value: 9’h100
Df0/DFER Function Event Register
This register is used for reporting of interrupt pending and power-management event detection in a
CardBus system. A field in this register is set when the corresponding field in the Function Present
State register changes its value. Writing "1" into a field clear the field. Writing "0" has no effect
BIT
ATTRIBUTE
BIT NAME
DESCRIPTION
31:16
R
---
Reserved. Fixed to 0.
15
R/WC
INTR
I
nterrupt Event
It is set when the interrupt is pending or FRS_INTR bit in the
register Dfc/DFFER[15] is set, regardless the mask value.
14:5
R
----
Reserved. Fixed to 0.
4
Sticky bit,
R/WC
GWAKE
General Wake-up Event
It is set when the PRE_GWAKE bit in register Df8/DFPSR[4]
changes its state from 0 to 1 or FRS_GWAKE bit in the
Dfc/DFFER[4] is set, regardless the mask value. This bit is
cleared by write 1 and writing 0 has no effect.
This bit is default to 0 if PMEB generation from D3
cold
is not
supported.
If PMEB generation from D3
cold
is supported, then this bit is
sticky and must be explicitly cleared by the operating system
each time it is initially loaded.
Note: When W89C841F is configured into CardBus system, writing 1 to the
field will clear this bit and the PME_Status bit in the register
Fe0/FPMR1[15] too. Or writing 1 to the PME_Status bit in the register
Fe0/FPMR1[15] will clear PME_Status bit and this GWAKE bit.
3:0
R
---
Reserved. Fixed to 0.
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相關代理商/技術參數
參數描述
W89C841F/D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller
W89C880F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller
W89C92 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER
W89C926 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER
W89C926F 制造商:WINBOND 制造商全稱:Winbond 功能描述:10M PCMCIA Ethernet Network Interface Controller