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參數資料
| 型號： | W921F840 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 4-Bit Microcontroller(4位的微控制器) |
| 中文描述： | 4位微控制器（第4位的微控制器） |
| 文件頁數： | 37/68頁 |
| 文件大小： | 451K |
| 代理商： | W921F840 |
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W921F840
Publication Release Date: October 1997
- 37 -
Revision A1
6.12.2 Interrupt Enable Flag
When the interrupt is enabled by the event, the program counter will jump to the interrupt address and
the enable interrupt flag (ENINT) bit0 is cleared, at the same time, all the interrupt will be disabled.
The only way to enable the interrupt again is to set the ENINT bit0 or execute the RTNI instruction.
ENINT register: (address = 034H, default data = 0H)
b3
b2
b1
b0
0: Disable all interrupt
1: Enable all interrupt
Reserved
Reserved
Reserved
When the interrupt is enabled by the event, the individual interrupt request signal is cleared by the
hardware automatically but the other interrupt request signals will keep the same condition. The only
method to reset the interrupt request signal is to execute the instruction CLR EVF, #I, it is a 2 words /
2 cycles instruction and the format of the immediate data is shown below.
i3
i2
i1
i0
1: TM2 interrupt request signal is cleared
1: TM1 interrupt request signal is cleared
1: TM0 interrupt request signal is cleared
1: TM3 interrupt request signal is cleared
i4
i5
i6
i7
1: Serial port interrupt request signal is cleared
1: P4.0 to P4.2 interrupt request signal is cleared
1: INT0 pin interrupt request signal is cleared
1: Comparator interrupt request signal is cleared
6.13 Operating Mode
There are three types of operating mode in this chip
normal mode, hold mode and stop mode.
6.13.1 Normal Mode:
All functions works well and the
μ
C operates according to the clock generated by the system clock.
6.13.2 Hold Mode:
In hold mode, all operations of
μ
C cease, except for the operation of the oscillator, timer/counter,
serial port and interrupt active pins. The
μ
C enters hold mode when the HOLD instruction is executed.
The hold mode can be released only by the RESET pin or the interrupt request signal. Before The
device enters the hold mode, the hold mode release flag1, 2, 3 (HMRF1, 2, 3, address = 036H, 037H,
038H) must be set to define the hold mode release conditions. If interrupt condition is met and enable
in hold mode, the interrupt will be accepted to release hold mode and jump to interrupt vector to
execute interrupt service routine. For more details, refer to the following flags and flow chart.
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