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參數(shù)資料
| 型號(hào)： | W9321 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | ADPCM Codec(ADPCM編解碼器) |
| 中文描述： | MU-LAW, ADPCM CODEC, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁(yè)數(shù)： | 19/35頁(yè) |
| 文件大?。?/td> | 457K |
| 代理商： | W9321 |
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Preliminary W9321
Publication Release Date: May 1999
- 19 -
Revision A1
Continued
RECEIVE ATTEN.[2] (B2) RECEIVE ATTEN.[1] B1)
RECEIVE ATTEN.[0]
(B0)
0
1
0
1
RECEIVE ATTENUATION
(DB)
-4
-5
-6
-7
1
1
1
1
0
0
1
1
Table 8-5 Receive Attenuation Control
8.2.4.
Byte Register 3 (BR3)
B7
B6
B5
B4
B3
B2
B1
B0
BR3
Digital Rx
Gain
Enable
r/w
Dig. Rx
Gain[6]
r/w
Dig. Rx
Gain[5]
r/w
Dig. Rx
Gain[4]
r/w
Dig. Rx
Gain[3]
r/w
Dig. Rx
Gain[2]
r/w
Dig. Rx
Gain[1]
r/w
Dig. Rx
Gain[0]
r/w
This register contains information on the digital receive gain. All bits are cleared when the
PDI/RESET pin is set to logic zero.
Digital Rx Gain Enable (b7):
Setting this bit will enable the digital receive gain routine in the DSP engine. The receive gain can be
programmed by setting the gain factors defined in this register BR3[B6:B0]. When this bit is cleared,
the digital receive gain routine is disabled.
Digital Rx Gain[6:0](b6:b0):
These seven bits show the value of the digital receive gain factor. The gain value is calculated as
follows:
2 * b6 + b5+ 1/2 *b4 + 1/4 * b3 + 1/8 *b2 +1/16 *b1 +1/32 * b0
The first two bits (b6:b5) are integers and the last five bits are fractions. The decimal point is placed
after bit 5. The gain range can be up to +12 dB.
8.2.5.
Byte Register 4 (BR4)
B7
B6
B5
B4
B3
B2
B1
B0
BR4
TonePar[7]
r/w
TonePar[6]
r/w
TonePar[5]
r/w
TonePar[4]
r/w
TonePar[3]
r/w
TonePar[2]
r/w
TonePar[1]
r/w
TonePar[0]
r/w
This register holds the parameters for the tone generator. All bits are cleared when the PDI/RESET
pin is set to logic zero.
Tone Generator Parameters[7:0](b7:b0):
These seven bits contain the eight LSB frequencies or tone generator attenuation coefficients. The
tone generator is enabled when the BR7[b3] register is set to 1. The four MSB tone parameters are
placed in BR5[b3:b0]. Switching between the frequency and attenuation factor is determined by the
BR5[b7:b6] register.
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