- 您現在的位置：買賣IC網 > PDF目錄363908 > W93902 (WINBOND ELECTRONICS CORP) POCSAG Decoder For Pagers(尋呼機的POCSAG 解碼器) PDF資料下載
參數資料
| 型號： | W93902 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 尋呼電路 |
| 英文描述： | POCSAG Decoder For Pagers(尋呼機的POCSAG 解碼器) |
| 中文描述： | TELECOM, PAGING DECODER, PDSO24 |
| 封裝： | SSOP-24 |
| 文件頁數： | 4/22頁 |
| 文件大?。?/td> | 244K |
| 代理商： | W93902 |
W93902
- 4 -
FUNCTIONAL DESCRIPTION
Operation Flow Chart
Power on
Txclk wait mode
ON = high
128 Txclk
Reset mode
Off mode
Board test mode
Y
N
Reset
Sync catch mode
1 to 15 times
Idle mode
Lock mode
N
L
o
s
t
S
y
n
c
C
a
t
c
h
S
y
n
c
Y
Switch off
Y
N
Catch sync
R
e
s
e
t
Txclk Wait Mode
After the power-on stage or the XRESET pin goes from low to high, the W93902 enters Txclk wait
mode. In this mode, the CPU should send 128 clock inputs to the TXCLK pin and address and options
data to the TXDATA pin. After 128 clocks are sent, the chip is programmed and enters the mode
determined by the ON pin. If more than 128 strobe clocks are sent to TXCLK, the chip ignores the
extra clocks.
The programming timing is shown in Figure 1, and programming data are shown in Table 1 to Table
30. Data are latched at the rising edge of the strobe clock.
相關PDF資料 |
PDF描述 |
|---|---|
| W93910 | ERMES(Enhanced Radio Emessage System) Paging Protcol Decoder(增強的無線電子信息系統尋呼解碼器) |
| W942508CH | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-5 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-6 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
| W942508CH-7 | 8M x 4 BANKS x 8 BIT DDR SDRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W93910 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ERMES PAGING DECODER |
| W9393 | 制造商:Winslow Adaptics Ltd 功能描述:28/32 way DIL-PLCC plug conversion,W9393 |
| W9395 | 制造商:Winslow Adaptics Ltd 功能描述:40/44 way DIL-PLCC plug conversion,W9395 |
| W93-A112-50 | 制造商:TE Connectivity 功能描述: |
| W93A8AD/SYC/H | 制造商:Kingbright Corporation 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。