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3.0 Functional Description
3.4 Segmentation Coprocessor
Bt8230
ATM Segmentation and Reassembly Controller—SAR
N8230DS1F
all ones. The PDU length and CRC fields in the VCC structure are updated for
each transmitted cell. If the EOM option is set in the buffer descriptor, the SAR-
PDU for the last cell is padded with zeros to fill 48 bytes. If the GEN_PDU and
EOM option bits are set in the buffer descriptor, an all-zero PAD field and the
AAL5 CPCS-PDU trailer are inserted at the end of the data from the buffer. The
PAD field is sized so that CPCS-PDU payload plus PAD plus CPCS-PDU trailer
is an integral multiple of 48 bytes. The CPCS-PDU trailer will be generated in a
separate cell if the length of the CPCS-PDU payload modulo 48 is zero or in the
range of 41–47 bytes.
The CPCS-UU field is read from the VCC structure, the CPI is encoded with
all zeros, and the length and CRC fields are read from the VCC structure. The
CRC field from the VCC structure is ones complemented before it is used in the
CPCS-PDU trailer.
If the PDU length in the VCC structure exceeds the maximum PDU length,
the buffer is aborted and a length error is placed on the status queue. The maxi-
mum PDU length is:
EOM set and GEN_PDU not set 65568
all other cases 65535
3.4.15 AAL0 SAR-PDU Generation
AAL0 cells may be sent as AAL5 cells by setting EOM and not setting the
GEN_PDU in each buffer descriptor. This prevents length errors from occurring
and allows the data from the host buffer to be segmented unchanged. If a VCC
only occasionally has data available, the Fast Start option in the buffer descriptor
can be used to transmit the data as soon as it is available. The CELL option in the
buffer descriptor can be used to read entire ATM cells (except for the HEC field)
from the segmentation buffer.
3.4.16 CRC-10 Generator
The segmentation coprocessor contains a CRC-10 generator that calculates a 10-
bit CRC over the first 374 bits of the generated SAR-PDU. The output of the
CRC-10 generator will overwrite the final 10 bits of the generated SAR-PDU if
the CRC_10 option is set in the current buffer descriptor. This option would nor-
mally be set for AAL3/4 VCCs and for OAM cells.
3.4.17 Transmit Cell FIFO
There is a 128-word FIFO, the transmit PHY interface FIFO, between the seg-
mentation coprocessor and the PHY interface. This FIFO stores up to nine com-
plete 52-octet cells. It is filled by the segmentation coprocessor and emptied by
the PHY. When data is not available for segmentation or when required by per-
channel rate control, the segmentation coprocessor inserts idle cells into the trans-
mit PHY interface FIFO. The transmit FIFO helps hide the bursty nature of the
cell generation and DMA process from the ATM physical interface. It also decou-
ples the ATM physical interface clock from the segmentation coprocessor. The
HEC byte must be calculated in the physical device.