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參數(shù)資料
型號(hào): W28F641B
廠商: WINBOND ELECTRONICS CORP
英文描述: 64MBIT (4MBIT 】 16) PAGE MODE DUAL WORK FLASH MEMORY
中文描述: 64兆比特(的4Mb】16)頁(yè)模式的雙工作閃存
文件頁(yè)數(shù): 26/31頁(yè)
文件大小: 389K
代理商: W28F641B
W28F641B/T
Notes:
1. A reset time, t
PHQV
, is required from the later of SR.7 going "1" or #RESET going high until outputs are valid. Refer to AC
Characteristics - Read-Only Operations for t
PHQV
.
2. t
PLPH
is <100 nS the device may still reset but this is not guaranteed.
3. Sampled, not 100% tested.
4. If #RESET asserted while a block erase, full chip erase, (page buffer) program or OTP program operation is not executing,
the reset will complete within 100 nS.
5. When the device power-up, holding #RESET low minimum 100ns is required after V
DD
has been in predefined range and also
has been in stable there.
Block Erase, Full Chip Erase, (Page Buffer) Program and OTP Program
Performance
(3)
V
DD
= 2.7V to 3.6V, T
A
= -40
°
C to +85
°
C
V
PP
=
V
PPH1
(IN SYSTEM)
V
PP
=
V
PPH2
(IN MANUFACTURING)
PARAMETER
SYM.
PAGE BUFFER
COMMAND IS
USED OR NOT
USED
MIN. TYP.
(1)
MAX.
(2)
MIN.
TYP.
(1)
MAX.
(2)
UNIT
Not Used
0.05
0.3
0.04
0.12
S
4K-Word Parameter Block
Program Time (note 2)
t
WPB
Used
0.03
0.12
0.02
0.06
S
Not Used
0.38
2.4
0.31
1.0
S
32K-Word Main Block
Program Time (note 2)
t
WMB
Used
0.24
1.0
0.17
0.5
S
Not Used
11
200
9
185
μ
S
Word Program Time (note 2)
t
WHQV1/
t
EHQV1
Used
7
100
5
90
μ
S
OTP Program Time (note 2)
t
WHOV1/
t
EHOV1
t
WHQV2/
t
EHQV2
t
WHQV3/
t
EHQV3
Not Used
36
400
27
185
μ
S
4K-Word Parameter Block
Erase Time (note 2)
-
0.3
4
0.2
4
S
32K-Word Main Block Erase
Time (note 2)
-
0.6
5
0.5
5
S
Full Chip Erase Time (note 2)
80
700
S
(Page Buffer) Program
Suspend Latency Time to
Read (note 4)
t
WHRH1/
t
EHRH1
-
5
10
5
10
μ
S
Block Erase Suspend Latency
Time to Read (note 4)
t
WHRH2/
t
EHRH2
-
5
20
5
20
μ
S
Latency Time from Block
Erase Resume Command to
Block Erase Suspend
Command (note 5)
T
ERES
-
500
500
μ
S
Notes:
1. Typical values measured at V
DD
= 3.0V, V
PP
= 3.0V or 12V, and T
A
= +25
°
C. Assumes corresponding lock bits are not set.
Subject to change based on device characterization.
2. Excludes external system-level overhead.
3. Sampled, but not 100% tested.
- 26 -
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