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參數資料
型號: W39V040AQ
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 512K 】 8 CMOS FLASH MEMORY WITH LPC INTERFACE
中文描述: 512K X 8 FLASH 3.3V PROM, 11 ns, PDSO32
封裝: 8 X 14 MM, STSOP-32
文件頁數: 17/34頁
文件大小: 384K
代理商: W39V040AQ
W39V040A
Publication Release Date: December 19, 2002
- 17 -
Revision A2
AC Characteristics
Read Cycle Timing Parameters
(V
DD
= 3.3V
±
0.3V, V
SS
= 0V, T
A
= 0 to 70
°
C)
W39V040A
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Read Cycle Time
T
RC
300
-
nS
Row/Column Address Set Up Time
T
AS
50
-
nS
Row/Column Address Hold Time
T
AH
50
-
nS
Address Access Time
T
AA
-
175
nS
Output Enable Access Time
T
OE
-
75
nS
#OE Low to Act Output
T
OLZ
0
-
nS
#OE High to High-Z Output
T
OHZ
-
35
nS
Output Hold from Address Change
T
OH
0
-
nS
Write Cycle Timing Parameters
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Reset Time
T
RST
1
-
-
μ
S
Address Setup Time
T
AS
50
-
-
nS
Address Hold Time
T
AH
50
-
-
nS
R/#C to Write Enable High Time
T
CWH
50
-
-
nS
#WE Pulse Width
T
WP
100
-
-
nS
#WE High Width
T
WPH
100
-
-
nS
Data Setup Time
T
DS
50
-
-
nS
Data Hold Time
T
DH
50
-
-
nS
#OE Hold Time
T
OEH
0
-
-
nS
Byte Programming Time
T
BP
-
35
50
μ
S
Sector/Page Erase Cycle Time
T
PEC
-
20
25
mS
Chip Erase Cycle Time
T
EC
-
75
100
mS
Note: All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is input high and (b) low level signal's reference level is input low.
Ref. to the AC testing condition.
Data Polling and Toggle Bit Timing Parameters
W39V040A
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
#OE to Data Polling Output Delay
T
OEP
-
40
nS
#OE to Toggle Bit Output Delay
T
OET
-
40
nS
相關PDF資料
PDF描述
W39V040BQ W39V040B
W39V040BQZ W39V040B
W39V040B W39V040B
W39V040BP W39V040B
W39V040BPZ W39V040B
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