
Preliminary W79E225A/227A Data Sheet
Publication Release Date: December 14, 2007
- 53 -
Revision A2.0
TIMER 2 MODE CONTROL
Bit:
7
6
5
4
3
2
1
0
HC5
HC4
HC3
HC2
T2CR
-
-
DCEN
Mnemonic: T2MOD
Address: C9h
BIT
NAME
FUNCTION
7
HC5
Hardware clears INT5 flag. Setting this bit allows the flag of External Interrupt 5
to be automatically cleared by hardware while entering the interrupt service
routine.
6
HC4
Hardware clears INT4 flag. Setting this bit allows the flag of External Interrupt 4
to be automatically cleared by hardware while entering the interrupt service
routine.
5
HC3
Hardware clears INT3 flag. Setting this bit allows the flag of External Interrupt 3
to be automatically cleared by hardware while entering the interrupt service
routine.
4
HC2
Hardware clears INT2 flag. Setting this bit allows the flag of External Interrupt 2
to be automatically cleared by hardware while entering the interrupt service
routine.
3
T2CR
Timer 2 Capture Reset. In the Timer 2 Capture Mode this bit enables/disables
hardware automatically reset timer 2 while the value in TL2 and TH2 have been
transferred into the capture register.
2-1
-
Reserved.
0
DCEN
Down Count Enable. This bit, in conjunction with the T2EX pin, controls the
up/down direction that timer 2 counts in 16-bit auto-reload mode.
TIMER 2 CAPTURE LSB
Bit:
7
6
5
4
3
2
1
0
RCAP2L.
7
RCAP2L.
6
RCAP2L.
5
RCAP2L.
4
RCAP2L.
3
RCAP2L.
2
RCAP2L.
1
RCAP2L.
0
Mnemonic: RCAP2L
Address: CAh
BIT
NAME
FUNCTION
7-0
RCAP2L
Timer 2 Capture LSB: This register is used to capture the TL2 value when a
timer 2 is configured in capture mode. RCAP2L is also used as the LSB of a 16
bit reload value when timer 2 is configured in auto reload mode.
TIMER 2 CAPTURE MSB
Bit:
7
6
5
4
3
2
1
0
RCAP2H.
7
RCAP2H.
6
RCAP2H.
5
RCAP2H.
4
RCAP2H.
3
RCAP2H.
2
RCAP2H.
1
RCAP2H.
0
Mnemonic: RCAP2H
Address: CBh