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參數資料
| 型號： | W79E804ASG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, SOP-20 |
| 文件頁數： | 74/115頁 |
| 文件大?。?/td> | 1456K |
| 代理商： | W79E804ASG |
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W79E804A/803A/802A
- 74 -
16. SERIAL PORT (UART)
Serial port in the W79E804 series is a full duplex port. The W79E804 series provide the user with
additional features such as the Frame Error Detection and the Automatic Address Recognition. The
serial ports are capable of synchronous as well as asynchronous communication. In Synchronous
mode the W79E804 series generate the clock and operates in a half duplex mode. In the
asynchronous mode, full duplex operation is available. This means that it can simultaneously transmit
and receive data. The transmit register and the receive buffer are both addressed as SBUF Special
Function Register. However any write to SBUF will be to the transmit register, while a read from SBUF
will be from the receiver buffer register. The serial port can operate in four different modes as
described below.
16.1 MODE 0
This mode provides synchronous communication with external devices. In this mode serial data is
transmitted and received on the RXD line. TXD is used to transmit the shift clock. The TxD clock is
provided by the W79E804 series whether the device is transmitting or receiving. This mode is
therefore a half duplex mode of serial communication. In this mode, 8 bits are transmitted or received
per frame. The LSB is Transmitted/Received first. The baud rate is fixed at 1/12 or 1/4 of the oscillator
frequency. This Baud Rate is determined by the SM2 bit (SCON.5). When this bit is set to 0, then the
serial port runs at 1/12 of the clock. When set to 1, the serial port runs at 1/4 of the clock. This
additional facility of programmable baud rate in mode 0 is the only difference between the standard
8051 and the W79E804 series.
The functional block diagram is shown below. Data enters and leaves the Serial port on the RxD line.
The TxD line is used to output the shift clock. The shift clock is used to shift data into and out of the
W79E804 series and the device at the other end of the line. Any instruction that causes a write to
SBUF will start the transmission. The shift clock will be activated and data will be shifted out on the
RxD pin till all 8 bits are transmitted. If SM2 = 1, then the data on RxD will appear 1 clock period
before the falling edge of shift clock on TxD. The clock on TxD then remains low for 2 clock periods,
and then goes high again. If SM2 = 0, the data on RxD will appear 3 clock periods before the falling
edge of shift clock on TxD. The clock on TxD then remains low for 6 clock periods, and then goes high
again. This ensures that at the receiving end the data on RxD line can either be clocked on the rising
edge of the shift clock on TxD or latched when the TxD clock is low.
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