
PCI TO ISA BRIDGE SET
W83628F & W83629D
PRELIMINARY
Publication Release Date: Jan 1999
- 18 - Revision 0.32
2.12
WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 1 MASK CONTROL
REGISTER
Address Offset:
59h
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 1, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 1.
2.13 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 2 MASK CONTROL
REGISTER
Address Offset:
5Ah
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 2, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 2.
2.14 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 3 MASK CONTROL
REGISTER
Address Offset:
5Bh
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 3, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 3.
2.15 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 4 MASK CONTROL
REGISTER
Address Offset:
5Ch
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 4, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 4.