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參數資料
| 型號： | W88227F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | ATAPI CD-ROM Decoder(支持ATAPI標準的CD-ROM解碼器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 76/116頁 |
| 文件大小： | 787K |
| 代理商： | W88227F |
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Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 72 -
1999/10/1 Rev: 0.70
ASSTA - ATAPI Shadow Status Register - (write 38h)
Bit 0:
SCHECK - Shadow Check Bit
If configured as a Master drive, the firmware should set SCHECK following each host write to
ATCMD to comply with ATAPI specification. Bit-7 of Shadow Status Register is the same as BSY of
Status Register. Bit 6-1 of Shadow Status Register are all 0s. SCHECK is de- activated by chip reset,
host reset, or host writes to Command Register regardless of which
drive is selected.
ASERR - ATAPI Shadow Error Register - (write 39h)
Bit 2:
SABRT - Shadow ABRT Bit
The microprocessor should set SABRT following each host write to ATCMD to comply with ATAPI
specification if configured as a master drive. The other bits of Shadow Error Register are all 0s..
LDDBL/LDDBH - Latched Decoded Data Block Register - (read 3Ah/3Bh)
The decoded data block number in DDBH/L is latched into LDDBH/L at the end of EDC check. This number
is available to the end of next EDC check. The LDDBH/L should not be used if
BICEN (9Ah.7)
is enabled.
APKSTA - Status Register for Automatic Packet Transfer - (write 3Dh)
Bit 4:
ADSC - Disk Seek Complete for Automatic Packet Transfer
The value of ADSC is the value of bit DSC in ATAPI Status Register during Automatic Packet
Command Transfers.
ASCSTA - Status Register for Automatic Status Completion - (write 3Eh)
Bit 6:
ADRDY - Drive Ready for Automatic Status Completion
The value of ADRDY is the value of bit DRDY in the ATAPI Status Register during Automatic Status
Completion.
Bit 2:
ACORR - Correctable Error for Automatic Status Completion
The value of ACORR is the value of bit CORR in the ATAPI Status Register during Automatic Status
Completion. CORR is de-activated by chip reset, host reset, or firmware reset.
Bit 0:
ACHECK - Check for Automatic Status Completion
The value of ACHECK is the value of bit CHECK in the ATAPI Status Register during Automatic
Status Completion. CHECK is de-activated by chip reset, host reset, or firmware reset.
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