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參數資料
| 型號： | W89C880F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | 100Base-Tx/T4 Multiport Repeater Controller(100Base-Tx/T4多端口中繼器控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數： | 10/26頁 |
| 文件大小： | 313K |
| 代理商： | W89C880F |
W89C880F FastMPR
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Data transfer: The MII bus utilizes TXD[0:3] and RXD[0:3] to transfer data. When an error occurs in
PHY, it will assert the RXER pin on the hub and then the hub asserts TXER on every other port.
Media status: If PHY detects a collision or carrier, it will notify the FastMPR that a collision has
occurred, that the link status is good, and so forth.
Management function: The FastMPR has four hardware-dependent registers, which are controlled by
both the MII interface and pin settings. The details are described in the MII Management section.
This interface is used to provide media independence for various types of wiring, such as unshielded
twisted pair, shielded twisted pair, fiber optic cable, and potentially other media. A media access
device can be used with this interface to form a LAN adapter or a hub port with any of these media.
The FastMPR provides two MII interfaces. One interface is for general purpose use; it supports the
MII management function and can drive up to 11 physical layers. The other interface provides Fast
Ethernet network extension functions. The extension port implementation allows a 100 Mbps Fast
Ethernet network to be easily segmented with a network distance limitation of 100 meters (similar to
10 Mbps Ethernet). A FastMPR application is shown in the following diagram.
General Application Architecture
FastMPR
ICRS
IBEN
ICOL
IDCLK
IJAM
IERR
IDAT<3:0>
FastMPR
ICRS
IBEN
ICOL
IDCLK
IJAM
IERR
IDAT<3:0>
MII
MII
PHY &
Xcvr1
PHY &
Xcvr2
PHY &
Xcvr11
....
Extension
Port
SRAM
100 meters
Any
Other
HUB
Inter FastMPR Interface Integrator
Figure 4
The following section gives a detailed description of each FastMPR function block:
MII Port Switch
The FastMPR connects to the physical layer controller (PHY) through the input pins RXDV, RXER,
RXC, and RXD<3:0> and the output pins TXER and TXD<3:0>. The direction of the data or signal
transfer is assigned by the FastMPR by asserting TXEN or RXEN. When it asserts TXEN, the
FastMPR is ready to regenerate and transfer packets to the connected port. The PHY device will then
fetch the packet and put it on the media through the PMD transceiver. When PHY sends out a CRS,
the FastMPR asserts RXEN to this PHY, before repeating this packet to all other TP ports.
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相關代理商/技術參數 |
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| W89C92P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10M CMOS Coaxial Transceiver |
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