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參數資料
| 型號： | W28V400B |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 4M(512K x 8/256K x 16) SMARTVOLTAGE FLASH MEMORY |
| 中文描述： | 4分（為512k × 8/256K × 16）SMARTVOLTA通用閃存 |
| 文件頁數： | 5/48頁 |
| 文件大?。?/td> | 1822K |
| 代理商： | W28V400B |
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W28V400B/T
Publication Release Date: April 11, 2003
- 5 -
Revision A4
The access time is 85ns (t
AVQV
) over the commercial temperature range (0
°
C to +70
°
C) and V
DD
supply voltage range of 4.75V to 5.25V. At lower V
DD
voltages, the access times are 90ns (4.5V to
5.5V), 100 nS (3.0V to 3.6V) and 120 nS (2.7V to 3.6V).
The Automatic Power Savings (APS) feature substantially reduces active current when the device is in
static mode (addresses not switching). In APS mode, the typical I
CCR
current is 1mA at V
DD
= 5V
.
When #CE and #RESET pins are at V
DD
, the I
CC
CMOS standby mode is enabled. When the #RESET
pin is at V
SS
, deep power-down mode is enabled which minimizes power consumption and provides
write protection during reset. A reset time (tPHQV) is required from #RESET switching high until
outputs are valid. Likewise, the device has a wake time (tPHEL) from #RESET-high until writes to the
CUI are recognized. With #RESET at V
SS
, the WSM is reset and the status register is cleared.
The device is available in 48-lead TSOP (Thin Small Outline Package, 1.2 mm thick). Pinout is shown
in Figure 2.
4. BLOCK DIAGRAM
Y-Gating
32x 7
Output Buffer
DQ0 -DQ15
Input Buffer
Identifier
MOutput
Status
RData
CUser
Interface
I/O Logic
CoData
A-1
VDD
#BYTE
Input
ALatch
Counter
DeY
DeX
Write
Voltage Switch
#CE
#WE
#OE
#RESET
#WP
RY/#BY
VPP
VDD
VSS
A0-A17
P
P
P
P
P
P
B
B
M
M
M
M
Figure 1. Block Diagram
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相關代理商/技術參數 |
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|---|---|
| W28V400BT85C | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M(512K x 8/256K x 16) SMARTVOLTAGE FLASH MEMORY |
| W28V400T | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M(512K x 8/256K x 16) SMARTVOLTAGE FLASH MEMORY |
| W28V400TT85C | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M(512K x 8/256K x 16) SMARTVOLTAGE FLASH MEMORY |
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