
Preliminary W79E225A/227A Data Sheet
Publication Release Date: December 14, 2007
- 187 -
Revision A2.0
MOVX Characteristics Using Stretch Memory Cycle, continud
PARAMETER
SYMBOL
VARIABLE
CLOCK
MIN.
VARIABLE
CLOCK
MAX.
UNITS
STRECH
Port 2 Address to
RD
or
WR
Low
t
AVWL2
1.5t
CLCL
- 5
2.5t
CLCL
- 5
nS
t
MCS
= 0
t
MCS
>0
Data Valid to WR Transition
t
QVWX
-5
1.0t
CLCL
- 5
nS
t
MCS
= 0
t
MCS
>0
Data Hold after Write
t
WHQX
t
CLCL
- 5
2.0t
CLCL
- 5
nS
t
MCS
= 0
t
MCS
>0
RD
Low to Address Float
t
RLAZ
0.5t
CLCL
- 5
nS
RD
or
WR
high to ALE high
t
WHLH
0
1.0t
CLCL
- 5
10
1.0t
CLCL
+ 5
nS
t
MCS
= 0
t
MCS
>0
Note:
t
MCS
is a time period related to the Stretch memory cycle selection. The following table shows the time period of t
MCS
for each selection of the Stretch value.
M2
M1
M0
MOVX CYCLES
T
MCS
0
0
0
2 machine cycles
0
0
0
1
3 machine cycles
4 t
CLCL
0
1
0
4 machine cycles
8 t
CLCL
0
1
1
5 machine cycles
12 t
CLCL
1
0
0
6 machine cycles
16 t
CLCL
1
0
1
7 machine cycles
20 t
CLCL
1
1
0
8 machine cycles
24 t
CLCL
1
1
1
9 machine cycles
28 t
CLCL
Explanation of Logics Symbols
In order to maintain compatibility with the original 8051 family, this device specifies the same
parameter for each device, using the same symbols. The explanation of the symbols is as follows.
t
Time
A
C
Clock
D
H
Logic level high
L
Address
Input Data
Logic level low
I
Instruction
P
PSEN
Q
Output Data
R
RD
signal
V
X
Valid
No longer a valid state
W
Z
WR
signal
Tri-state