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參數資料
| 型號： | W971632AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 256K x 32 bit x 2 Banks SGRAM(256K x 32位 x 2組同步圖形RAM) |
| 中文描述： | 256K × 32位× 2銀行SGRAM（256K × 32位× 2組同步圖形RAM）的 |
| 文件頁數： | 15/55頁 |
| 文件大?。?/td> | 2653K |
| 代理商： | W971632AF |
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W971632AF
256K x 32 bit x 2 Banks SGRAM
Revision 1.0 Publication Release Date: March, 1999
- 15 -
BLOCK WRITE
Block write is a feature allowing the simultaneous writing of consecutive 8 columns of data within a RAM device during a sin-gle
access cycle. During block write the data to be written comes from an internal "color" register and DQ I/O pins are used for
independent column selection. The block of column to be written is aligned on 8 column boundaries and is defined by the column
address with the 3 LSB’s ignored. Write command with DSF=1 enables block write for the associated bank. A write command
with DSF=0 enables normal write for the associated bank. The block width is 8 column where column="n" bits for by "n" part.
The color register is the same width as the data port of the chip.It is written via a SWCBR where data present on the DQ pin is to
be coupled into the internal color register. The color register provides the data masked by the DQ column select, WPB mask(If
enabled), and DQM byte mask. Column data masking( Pixel masking) is provided on an individual column basis for each byte of
data. The column mask is driven on the DQ pins during a block write command. The DQ column mask function is segmented on a
per bit basis(i.e. DQ[0:7] provides the column mask for data bits[0:7], DQ[8:15] provides the column mask for data bits[8:15],
DQ0 masks column[0] for data bits[0:7], DQ9 masks column [1] for data bits [8:15], etc). Block writes are always non-burst,
independent of the burst length that has been programmed into the mode register. Back to back block writes are allowed provided
that the specified block write cycle time(t
BWC
) is satisfied. If write per bit was enabled by the bank active command with DSF=1,
then write per bit masking of the color register data is enabled. If write per bit was disabled by a bank active command with
DSF=0, the write per bit masking of the color register data is disabled. DQM masking provides independent data byte masking
during block writes exactly the same as it does during normal write operations, except that the control is extended to the
consecutive 8 columns of the block write.
相關PDF資料 |
PDF描述 |
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| W981208AH | 4M x 8 bit x 4 Banks SDRAM |
| W981208BH | 4M x 4 BANKS x 8 BIT SDRAM |
| W981208AH-75 | x8 SDRAM |
| W981208AH-8H | x8 SDRAM |
| W981208BH-7 | x8 SDRAM |
相關代理商/技術參數 |
參數描述 |
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| W971GG6JB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M ? 8 BANKS ? 16 BIT DDR2 SDRAM |
| W971GG6JB-18 | 制造商:Winbond Electronics Corp 功能描述:1GB DDR2 制造商:Winbond Electronics Corp 功能描述:IC DDR2 SDRAM 1GBIT 1.875NS |
| W971GG6JB-25 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 1G-Bit 64Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics 功能描述:64MBX16 DDR2 制造商:Winbond 功能描述:DRAM Chip DDR2 SDRAM 1G-Bit 64Mx16 1.8V 84-Pin WBGA |
| W971GG6JB25I | 功能描述:IC DDR2 SDRAM 1GBIT 84WBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:32K (4K x 8) 速度:100kHz，400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) 其它名稱:CAV24C32WE-GT3OSTR |
| W971GG6JB-25I | 制造商:Winbond Electronics 功能描述:-40~85 1GB DDR2 FOR INDUSTRY |
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