
W741E260
Publication Release Date: March 1998
- 29 -
Revision A2
The relationship between the LCD drive mode and the maximum number of drivable LCD segments is
shown below.
LCD Drive Mode
Max. Number of Drivable
LCD Segment
Connection at
Power Input
STATIC
32 (COM0)
Connect V
DD3,
V
DD2
to
V
DD1
1/2 Bias 1/2 Duty
64 (COM0-COM1)
Connect V
DD3
to V
DD2
1/2 Bias 1/3 Duty
96 (COM0-COM2)
Connect V
DD3
to V
DD2
1/3 Bias 1/3 Duty
96 (COM0-COM2)
-
1/3 Bias 1/4 Duty
128 (COM0-COM3)
-
LCD Output Mode Type Flag (LCDM)
The LCD output mode type flag is organized as an 8-bit binary register (LCDM.0 to LCDM.7). These
bits are used to control the LCD output pins architecture. When LCD output pins are set to DC output
mode by option codes, the architecture of these output pins (segment 0 to segment 31) can be
selected as CMOS or NMOS type. It is controlled by the MOV LCDM, #I instruction. The bit
descriptions are as follows:
4
5
7
6
w
1
2
3
LCDM
w
w
0
w
w
w
w
w
Note: W means write only.
LCDM.0 = 0 SEG0 to SEG3 work as CMOS output type.
= 1 SEG0 to SEG3 work as NMOS output type.
LCDM.1 = 0 SEG4 to SEG7 work as CMOS output type.
= 1 SEG4 to SEG7 work as NMOS output type.
LCDM.2 = 0 SEG8 to SEG11 work as CMOS output type.
= 1 SEG8 to SEG11 work as NMOS output type.
LCDM.3 = 0 SEG12 to SEG15 work as CMOS output type.
= 1 SEG12 to SEG15 work as NMOS output type.
LCDM.4 = 0 SEG16 to SEG19 work as CMOS output type.
= 1 SEG16 to SEG19 work as NMOS output type.
LCDM.5 = 0 SEG20 to SEG23 work as CMOS output type.
= 1 SEG20 to SEG23 work as NMOS output type.
LCDM.6 = 0 SEG24 to SEG27 work as CMOS output type.
= 1 SEG24 to SEG27 work as NMOS output type.
LCDM.7 = 0 SEG28 to SEG31 work as CMOS output type.
= 1 SEG28 to SEG31 work as NMOS output type.
The output waveforms for the five LCD driving modes are shown below.