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參數資料
| 型號： | W741E260 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT FLASH MICROCONTROLLER |
| 中文描述： | 4-BIT, FLASH, 4.19 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數： | 9/94頁 |
| 文件大小： | 554K |
| 代理商： | W741E260 |
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W741E260
Publication Release Date: March 1998
- 9 -
Revision A2
The first sixteen addresses (00H to 0FH) in the data memory are known as the working registers
(WR). The other data memory is used as general memory and cannot operate directly with immediate
data. The relationship between data memory locations and the page register (PAGE) in indirect
addressing mode is described in the next section.
2. Page Register (PAGE)
The page register is organized as a 4-bit binary register. The bit descriptions are as follows:
Note: R/W means read/write available.
R/W
R/W
R/W
0
1
2
3
PAGE
Bit 3 is reserved.
Bit 2, Bit 1, Bit 0 Indirect addressing mode preselect bits:
000 = Page 0 (00H - 0FH)
001 = Page 1 (10H - 1FH)
010 = Page 2 (20H - 2FH)
011 = Page 3 (30H - 3FH)
100 = Page 4 (40H - 4FH)
101 = Page 5 (50H - 5FH)
110 = Page 6 (60H - 6FH)
111 = Page 7 (70H - 7FH)
Accumulator (ACC)
The accumulator (ACC) is a 4-bit register used to hold results from the ALU and transfer data between
the memory, I/O ports, and registers.
Arithmetic and Logic Unit (ALU)
This is a circuit which performs arithmetic and logic operations. The ALU provides the following
functions:
Logic operations: ANL, XRL, ORL
Branch decisions: JB0, JB1, JB2, JB3, JNZ, JZ, JC, JNC, DSKZ, DSKNZ, SKB0, SKB1, SKB2, SKB3
Shift operations: SHRC, RRC, SHLC, RLC
Binary additions/subtractions: ADC, SBC, ADD, SUB, ADU, DEC, INC
After any of the above instructions are executed, the status of the carry flag (CF) and zero flag (ZF) is
stored in the internal registers. Otherwise CF can be stored or be read out by executing MOVA R, CF
or MOV CF, R.
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