
W83877TF
WINBOND I/O
Publication Release Date: May 1997
Preliminary Version 0.60
- I -
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................1
FEATURES ..........................................................................................................................2
PIN CONFIGURATION......................................................................................................4
1.0
1.1
1.2
1.3
1.4
PIN DESCRIPTION ........................................................................................................................5
HOST INTERFACE .........................................................................................................................5
SERIAL PORT INTERFACE ...........................................................................................................7
MULTI-MODE PARALLEL PORT..................................................................................................8
FDC INTERFACE..........................................................................................................................14
2.0 FDC FUNCTIONAL DESCRIPTION........................................................................16
2.1
2.2
W83877TF FDC.............................................................................................................................16
REGISTER DESCRIPTIONS .........................................................................................................28
3.0 UART PORT................................................................................................................39
3.1
3.2
UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART A, UART B)..................39
REGISTER ADDRESS...................................................................................................................40
4.0 PARALLEL PORT.....................................................................................................49
4.1
4.2
4.3
4.4
4.5
PRINTER INTERFACE LOGIC.....................................................................................................49
ENHANCED PARALLEL PORT (EPP) .........................................................................................51
EXTENDED CAPABILITIES PARALLEL (ECP) PORT...............................................................55
EXTENSION FDD MODE (EXTFDD)...........................................................................................64
EXTENSION 2FDD MODE (EXT2FDD).......................................................................................64
5.0 PLUG AND PLAY CONFIGURATION....................................................................65
6.0 ACPI /LEGACY FEATURE AND AUTO POWER MANAGEMENT.....................65
6.1
6.2
ACPI/LEGACY POWER MANAGEMENT ...................................................................................65
AUTO(DEVICE) POWER MANAGEMENT..................................................................................65