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參數資料
| 型號： | W742C81A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT MICROCONTROLLER |
| 中文描述： | 4-BIT, FLASH, MICROCONTROLLER, UUC100 |
| 封裝： | DIE-100 |
| 文件頁數： | 17/45頁 |
| 文件大小： | 567K |
| 代理商： | W742C81A |
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Preliminary W742E81A/W742C81A
Publication Release Date: April 2000
Revision A1
- 17 -
6.12.2 Timer 1 (TM1)
Timer 1 (TM1) is also a programmable 8-bit binary down counter, as shown in Figure 6-7. Timer 1
can be used as to output an arbitrary frequency to the MFP pin. The input clock of Timer 1 can be
one of three sources: F
OSC
/64, F
OSC
, or Fs. The source can be selected by setting bit 0 and bit 1 of
mode register 1 (MR1). At initial reset, the Timer 1 clock input is F
OSC
. When the MOV TM1L, R or
MOV TM1H,R instruction is executed, the specified data are loaded into the auto-reload buffer; but
the TM1 down-counting will keep going on. If the bit 3 of MR1 is set (MR1.3 = 1), the content of the
auto-reload buffer will be loaded into the TM1 down counter, and Timer 1 starts to down count, and
the event flag 7 is reset (EVF.7 = 0). When the timer decreases and underflow to FFH, it will generate
an underflow (EVF.7 = 1) and be auto-reloaded with the specified data, after which it will continue to
count down. Then, if interrupt enable flag 7 has been set to 1 (IEF.7 = 1), an interrupt is executed; if
hold mode release enable flag 7 is set to 1 (HEF.7 = 1), the hold state is terminated. The specified
frequency of Timer 1 can be delivered to the MFP output pin by programming bit 2 of MR1. Bit 3 of
MR1 can be used to make Timer 1 stop or start counting.
In a case where Timer 1 clock input is F
T
:
Desired Timer 1 interval = (preset value +1) / F
T
Desired frequency for MFP output pin = F
T
÷
(preset value + 1)
÷
2 (Hz)
Preset value: Decimal number of Timer 1 preset value
F
OSC
: Clock oscillation frequency
Auto-reload buffer
8 bits
MR1.3
Underflow signal
EVF.7
1. Reset
2. INT7 accept
3. CLR EVF, #80H
4. Set MR1.3 to 1
MFP
MFP
signal
BUZCR.0
output pin
8-Bit Binary
Down Counter
(Timer 1)
2
circuit
Reset
Reset
Disable
Enable
Fosc/64
Fosc
MR1.0
S
R
Q
T
F
4
4
MOV TM1H,R
MOV TM1L,R
Set
MR1.3 to 1
MR1.1
Fs
MOV WR,TM1
8 bits
Figure 6-7 Organization of Timer 1
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