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參數資料
型號: W742C81A
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 4-BIT MICROCONTROLLER
中文描述: 4-BIT, FLASH, MICROCONTROLLER, UUC100
封裝: DIE-100
文件頁數: 9/45頁
文件大小: 567K
代理商: W742C81A
Preliminary W742E81A/W742C81A
Publication Release Date: April 2000
Revision A1
- 9 -
6.4 Data Memory (RAM)
6.4.1 Architecture
The static data memory (RAM) used to store data is arranged as 2048
×
4 bits. The data RAM is
divided into sixteen banks; each bank has 128
×
4 bits. Executing the MOV DBKR,WR or MOV
DBKR,#I instruction can determine which data bank is used. The data memory can be addressed
directly or indirectly. But the data bank must be confirmed firstly; and the page in the data bank will
be done in the indirect addressing mode, too. In indirect addressing mode, each data bank will be
divided into eight pages. Before the data memory is addressed indirectly, the page which the data
memory is in must be confirmed. The organization of the data memory is shown in Figure 6-2.
1st data bank
(or Working Registers bank)
2048
addresses
000H
:
07FH
080H
:
0FFH
4 bits
2048 * 4 bits
2nd data bank
(or Working Registers bank)
:
:
780H
:
7FFH
16th data bank
00H
:
0FH
10H
:
1FH
20H
:
2FH
70H
:
7FH
:
:
1st data RAM page
(or 1st WR page)
2nd data RAM page
(or 2nd WR page)
8(or 8th WR page)
3(or 3rd WR page)
3rd data bank
Figure 6-2 Data Memory Organization
The 1st and 2nd data bank (00H to 7FH & 80H to FFH) in the data memory can also be used as the
working registers (WR). It is also divided into sixteen pages. Each page contains 16 working registers.
When one page is used as WR, the others can be used as the normal data memory. The WR page
can be switched by executing the MOV WRP,R or MOV WRP,#I instruction. The data memory cannot
operate directly with immediate data, but the WR can do. The relationship between data memory
locations and the page register (PAGE) in indirect addressing mode is described in the next sub-
section.
6.4.2 Page Register (PAGE)
The page register is organized as a 4-bit binary register. The bit descriptions are as follows:
R/W
R/W
R/W
0
1
2
3
PAGE
Note: R/W means read/write available.
Bit 3 is reserved.
Bit 2, Bit 1, Bit 0 Indirect addressing mode preselect bits:
000 = Page 0 (00H - 0FH)
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