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參數(shù)資料
型號(hào): W79E217A
廠(chǎng)商: WINBOND ELECTRONICS CORP
元件分類(lèi): 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 33/207頁(yè)
文件大小: 3738K
代理商: W79E217A
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Preliminary W79E217A Data Sheet
Publication Release Date: December 14, 2007
- 33 -
Revision A3.0
Continued
BIT
NAME
FUNCTION
6
EWR
Set this bit is write data to NVM data memory by NVMADDRH and NVMADDRL
to decode NVM data memory. If finished, NVMF flag will be set to “1”, and then
this bit will be cleared. If NVMF flag is set, the erase and write NVM are invalid.
To enable read NVM data memory area, refer as below table.
0: To disable the MOVX instruction to read NVM data memory.
1: To enable the MOVX instruction to read NVM data memory, the External
RAM or AUX-RAM will be disabled.
Reserved.
NVM data memory erases or writes finished flag.
If NVM data memory is finished by erase or write, it will be set to “1” by
hardware and clear by software. And it will be interrupted when NVM
erase/write interrupt is enabled.
5
EnNVM
4~1
-
0
NVMF
ISP CONTROL REGISTER
Bit:
7
6
5
4
3
2
1
0
SWRST/
HWB
-
LD/AP
-
-
-
LDSEL
ENP
Mnemonic: CHPCON
Address: 9Fh
BIT
NAME
FUNCTION
7
W:SWRST
R:HWB
Write access to this bit is different from read access.
Write this bit to 1 to force the microcontroller to reset to the initial condition, just
like power-on reset. This action re-boots the microcontroller and starts normal
operation. This bit will be cleared during the reset.
Read this bit to determine whether or not a hardware reboot is in progress. If
CPU is rebooted by P3.6 & P3.7 or P4.3, this bit is set to 1 after the hardware
reboot.
Reserved.
0: CPU is executing AP Flash EPROM
1: CPU is executing LD Flash EPROM
Reserved.
Loader Program Location Selection. This bit should be set before entering ISP
mode.
0: The executing program is in the 64-KB AP Flash EPROM. The 4-KB LD
Flash EPROM is the destination for re-programming.
1: The executing program is in the 4-KB memory bank. The 64-KB AP Flash
EPROM is the destination for re-programming.
FLASH EPROM Programming Enable.
1: Enable in-system programming mode. In this mode, erase, program and read
operations are achieved.
0: Disable in-system programming mode. The on-chip flash memory is read-only.
6
-
LD/AP
(read-only)
4-2 -
5
1
LDSEL
(write-only)
0
ENP
The way to enter ISP mode is to set ENP to 1 and write LDSEL properly then force CPU in IDLE
mode, after IDLE mode is released CPU will restart from AP or LD ROM according the value of
LDSEL.
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